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<div class="header">
  <div class="headertitle"><div class="title">stm32h7xx_ll_pwr.h</div></div>
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<a href="stm32h7xx__ll__pwr_8h.html">Go to the documentation of this file.</a><div class="fragment"><div class="line"><a id="l00001" name="l00001"></a><span class="lineno">    1</span></div>
<div class="line"><a id="l00018" name="l00018"></a><span class="lineno">   18</span> </div>
<div class="line"><a id="l00019" name="l00019"></a><span class="lineno">   19</span><span class="comment">/* Define to prevent recursive inclusion -------------------------------------*/</span></div>
<div class="line"><a id="l00020" name="l00020"></a><span class="lineno">   20</span><span class="preprocessor">#ifndef STM32H7xx_LL_PWR_H</span></div>
<div class="line"><a id="l00021" name="l00021"></a><span class="lineno">   21</span><span class="preprocessor">#define STM32H7xx_LL_PWR_H</span></div>
<div class="line"><a id="l00022" name="l00022"></a><span class="lineno">   22</span> </div>
<div class="line"><a id="l00023" name="l00023"></a><span class="lineno">   23</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l00024" name="l00024"></a><span class="lineno">   24</span><span class="keyword">extern</span> <span class="stringliteral">&quot;C&quot;</span> {</div>
<div class="line"><a id="l00025" name="l00025"></a><span class="lineno">   25</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l00026" name="l00026"></a><span class="lineno">   26</span> </div>
<div class="line"><a id="l00027" name="l00027"></a><span class="lineno">   27</span><span class="comment">/* Includes ------------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00028" name="l00028"></a><span class="lineno">   28</span><span class="preprocessor">#include &quot;<a class="code" href="stm32h7xx_8h.html">stm32h7xx.h</a>&quot;</span></div>
<div class="line"><a id="l00029" name="l00029"></a><span class="lineno">   29</span></div>
<div class="line"><a id="l00033" name="l00033"></a><span class="lineno">   33</span> </div>
<div class="line"><a id="l00034" name="l00034"></a><span class="lineno">   34</span><span class="preprocessor">#if defined (PWR)</span></div>
<div class="line"><a id="l00035" name="l00035"></a><span class="lineno">   35</span></div>
<div class="line"><a id="l00039" name="l00039"></a><span class="lineno">   39</span> </div>
<div class="line"><a id="l00040" name="l00040"></a><span class="lineno">   40</span><span class="comment">/* Private types -------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00041" name="l00041"></a><span class="lineno">   41</span><span class="comment">/* Private variables ---------------------------------------------------------*/</span></div>
<div class="line"><a id="l00042" name="l00042"></a><span class="lineno">   42</span><span class="comment">/* Private constants ---------------------------------------------------------*/</span></div>
<div class="line"><a id="l00046" name="l00046"></a><span class="lineno">   46</span></div>
<div class="line"><a id="l00051" name="l00051"></a><span class="lineno">   51</span><span class="comment">/* Wake-Up Pins PWR register offsets */</span></div>
<div class="line"><a id="l00052" name="l00052"></a><span class="lineno">   52</span><span class="preprocessor">#define LL_PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET    2UL</span></div>
<div class="line"><a id="l00053" name="l00053"></a><span class="lineno">   53</span><span class="preprocessor">#define LL_PWR_WAKEUP_PINS_MAX_SHIFT_MASK       0x1FU</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00060" name="l00060"></a><span class="lineno">   60</span><span class="comment">/* Private macros ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00061" name="l00061"></a><span class="lineno">   61</span><span class="comment">/* Exported types ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00062" name="l00062"></a><span class="lineno">   62</span><span class="comment">/* Exported constants --------------------------------------------------------*/</span></div>
<div class="line"><a id="l00066" name="l00066"></a><span class="lineno">   66</span></div>
<div class="line"><a id="l00071" name="l00071"></a><span class="lineno">   71</span><span class="preprocessor">#define LL_PWR_FLAG_CPU_CSSF          PWR_CPUCR_CSSF      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00072" name="l00072"></a><span class="lineno">   72</span><span class="preprocessor">#if defined (DUAL_CORE)</span></div>
<div class="line"><a id="l00073" name="l00073"></a><span class="lineno">   73</span><span class="preprocessor">#define LL_PWR_FLAG_CPU2_CSSF         PWR_CPU2CR_CSSF     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00074" name="l00074"></a><span class="lineno">   74</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00075" name="l00075"></a><span class="lineno">   75</span><span class="preprocessor">#define LL_PWR_FLAG_WKUPCR_WKUPC6     PWR_WKUPCR_WKUPC6   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00076" name="l00076"></a><span class="lineno">   76</span><span class="preprocessor">#if defined (PWR_WKUPCR_WKUPC5)</span></div>
<div class="line"><a id="l00077" name="l00077"></a><span class="lineno">   77</span><span class="preprocessor">#define LL_PWR_FLAG_WKUPCR_WKUPC5     PWR_WKUPCR_WKUPC5   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00078" name="l00078"></a><span class="lineno">   78</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPCR_WKUPC5) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00079" name="l00079"></a><span class="lineno">   79</span><span class="preprocessor">#define LL_PWR_FLAG_WKUPCR_WKUPC4     PWR_WKUPCR_WKUPC4   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00080" name="l00080"></a><span class="lineno">   80</span><span class="preprocessor">#if defined (PWR_WKUPCR_WKUPC3)</span></div>
<div class="line"><a id="l00081" name="l00081"></a><span class="lineno">   81</span><span class="preprocessor">#define LL_PWR_FLAG_WKUPCR_WKUPC3     PWR_WKUPCR_WKUPC3   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00082" name="l00082"></a><span class="lineno">   82</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPCR_WKUPC3) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00083" name="l00083"></a><span class="lineno">   83</span><span class="preprocessor">#define LL_PWR_FLAG_WKUPCR_WKUPC2     PWR_WKUPCR_WKUPC2   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00084" name="l00084"></a><span class="lineno">   84</span><span class="preprocessor">#define LL_PWR_FLAG_WKUPCR_WKUPC1     PWR_WKUPCR_WKUPC1   </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00088" name="l00088"></a><span class="lineno">   88</span></div>
<div class="line"><a id="l00093" name="l00093"></a><span class="lineno">   93</span><span class="preprocessor">#define LL_PWR_FLAG_AVDO              PWR_CSR1_AVDO       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00094" name="l00094"></a><span class="lineno">   94</span><span class="preprocessor">#define LL_PWR_FLAG_PVDO              PWR_CSR1_PVDO       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00095" name="l00095"></a><span class="lineno">   95</span><span class="preprocessor">#define LL_PWR_FLAG_ACTVOS            PWR_CSR1_ACTVOS     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00096" name="l00096"></a><span class="lineno">   96</span><span class="preprocessor">#define LL_PWR_FLAG_ACTVOSRDY         PWR_CSR1_ACTVOSRDY  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00097" name="l00097"></a><span class="lineno">   97</span><span class="preprocessor">#if defined (PWR_CSR1_MMCVDO)</span></div>
<div class="line"><a id="l00098" name="l00098"></a><span class="lineno">   98</span><span class="preprocessor">#define LL_PWR_FLAG_MMCVDO            PWR_CSR1_MMCVDO     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00099" name="l00099"></a><span class="lineno">   99</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CSR1_MMCVDO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00100" name="l00100"></a><span class="lineno">  100</span> </div>
<div class="line"><a id="l00101" name="l00101"></a><span class="lineno">  101</span><span class="preprocessor">#define LL_PWR_FLAG_TEMPH             PWR_CR2_TEMPH       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00102" name="l00102"></a><span class="lineno">  102</span><span class="preprocessor">#define LL_PWR_FLAG_TEMPL             PWR_CR2_TEMPL       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00103" name="l00103"></a><span class="lineno">  103</span><span class="preprocessor">#define LL_PWR_FLAG_VBATH             PWR_CR2_VBATH       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00104" name="l00104"></a><span class="lineno">  104</span><span class="preprocessor">#define LL_PWR_FLAG_VBATL             PWR_CR2_VBATL       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00105" name="l00105"></a><span class="lineno">  105</span><span class="preprocessor">#define LL_PWR_FLAG_BRRDY             PWR_CR2_BRRDY       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00106" name="l00106"></a><span class="lineno">  106</span> </div>
<div class="line"><a id="l00107" name="l00107"></a><span class="lineno">  107</span><span class="preprocessor">#define LL_PWR_FLAG_USBRDY            PWR_CR3_USB33RDY    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00108" name="l00108"></a><span class="lineno">  108</span><span class="preprocessor">#define LL_PWR_FLAG_SMPSEXTRDY        PWR_CR3_SMPSEXTRDY  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00109" name="l00109"></a><span class="lineno">  109</span> </div>
<div class="line"><a id="l00110" name="l00110"></a><span class="lineno">  110</span><span class="preprocessor">#if defined (PWR_CPUCR_SBF_D2)</span></div>
<div class="line"><a id="l00111" name="l00111"></a><span class="lineno">  111</span><span class="preprocessor">#define LL_PWR_FLAG_CPU_SBF_D2        PWR_CPUCR_SBF_D2    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00112" name="l00112"></a><span class="lineno">  112</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_SBF_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00113" name="l00113"></a><span class="lineno">  113</span><span class="preprocessor">#if defined (PWR_CPUCR_SBF_D1)</span></div>
<div class="line"><a id="l00114" name="l00114"></a><span class="lineno">  114</span><span class="preprocessor">#define LL_PWR_FLAG_CPU_SBF_D1        PWR_CPUCR_SBF_D1    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00115" name="l00115"></a><span class="lineno">  115</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_SBF_D1 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00116" name="l00116"></a><span class="lineno">  116</span><span class="preprocessor">#define LL_PWR_FLAG_CPU_SBF           PWR_CPUCR_SBF       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00117" name="l00117"></a><span class="lineno">  117</span><span class="preprocessor">#define LL_PWR_FLAG_CPU_STOPF         PWR_CPUCR_STOPF     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00118" name="l00118"></a><span class="lineno">  118</span><span class="preprocessor">#if defined (DUAL_CORE)</span></div>
<div class="line"><a id="l00119" name="l00119"></a><span class="lineno">  119</span><span class="preprocessor">#define LL_PWR_FLAG_CPU_HOLD2F        PWR_CPUCR_HOLD2F    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00120" name="l00120"></a><span class="lineno">  120</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00121" name="l00121"></a><span class="lineno">  121</span> </div>
<div class="line"><a id="l00122" name="l00122"></a><span class="lineno">  122</span><span class="preprocessor">#if defined (DUAL_CORE)</span></div>
<div class="line"><a id="l00123" name="l00123"></a><span class="lineno">  123</span><span class="preprocessor">#define LL_PWR_FLAG_CPU2_SBF_D2       PWR_CPU2CR_SBF_D2   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00124" name="l00124"></a><span class="lineno">  124</span><span class="preprocessor">#define LL_PWR_FLAG_CPU2_SBF_D1       PWR_CPU2CR_SBF_D1   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00125" name="l00125"></a><span class="lineno">  125</span><span class="preprocessor">#define LL_PWR_FLAG_CPU2_SBF          PWR_CPU2CR_SBF      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00126" name="l00126"></a><span class="lineno">  126</span><span class="preprocessor">#define LL_PWR_FLAG_CPU2_STOPF        PWR_CPU2CR_STOPF    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00127" name="l00127"></a><span class="lineno">  127</span><span class="preprocessor">#define LL_PWR_FLAG_CPU2_HOLD1F       PWR_CPU2CR_HOLD1F   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00128" name="l00128"></a><span class="lineno">  128</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00129" name="l00129"></a><span class="lineno">  129</span> </div>
<div class="line"><a id="l00130" name="l00130"></a><span class="lineno">  130</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span></div>
<div class="line"><a id="l00131" name="l00131"></a><span class="lineno">  131</span><span class="preprocessor">#define LL_PWR_D3CR_VOSRDY            PWR_D3CR_VOSRDY     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00132" name="l00132"></a><span class="lineno">  132</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00133" name="l00133"></a><span class="lineno">  133</span><span class="preprocessor">#define LL_PWR_SRDCR_VOSRDY           PWR_SRDCR_VOSRDY    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00134" name="l00134"></a><span class="lineno">  134</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00135" name="l00135"></a><span class="lineno">  135</span> </div>
<div class="line"><a id="l00136" name="l00136"></a><span class="lineno">  136</span><span class="preprocessor">#define LL_PWR_WKUPFR_WKUPF6          PWR_WKUPFR_WKUPF6   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00137" name="l00137"></a><span class="lineno">  137</span><span class="preprocessor">#if defined (PWR_WKUPFR_WKUPF5)</span></div>
<div class="line"><a id="l00138" name="l00138"></a><span class="lineno">  138</span><span class="preprocessor">#define LL_PWR_WKUPFR_WKUPF5          PWR_WKUPFR_WKUPF5   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00139" name="l00139"></a><span class="lineno">  139</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPFR_WKUPF5) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00140" name="l00140"></a><span class="lineno">  140</span><span class="preprocessor">#define LL_PWR_WKUPFR_WKUPF4          PWR_WKUPFR_WKUPF4   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00141" name="l00141"></a><span class="lineno">  141</span><span class="preprocessor">#if defined (PWR_WKUPFR_WKUPF3)</span></div>
<div class="line"><a id="l00142" name="l00142"></a><span class="lineno">  142</span><span class="preprocessor">#define LL_PWR_WKUPFR_WKUPF3          PWR_WKUPFR_WKUPF3   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00143" name="l00143"></a><span class="lineno">  143</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPFR_WKUPF3) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00144" name="l00144"></a><span class="lineno">  144</span><span class="preprocessor">#define LL_PWR_WKUPFR_WKUPF2          PWR_WKUPFR_WKUPF2   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00145" name="l00145"></a><span class="lineno">  145</span><span class="preprocessor">#define LL_PWR_WKUPFR_WKUPF1          PWR_WKUPFR_WKUPF1   </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00149" name="l00149"></a><span class="lineno">  149</span></div>
<div class="line"><a id="l00153" name="l00153"></a><span class="lineno">  153</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span></div>
<div class="line"><a id="l00154" name="l00154"></a><span class="lineno">  154</span><span class="preprocessor">#define LL_PWR_CPU_MODE_D1STOP        0x00000000U           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00155" name="l00155"></a><span class="lineno">  155</span><span class="preprocessor">#define LL_PWR_CPU_MODE_D1STANDBY     PWR_CPUCR_PDDS_D1     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00156" name="l00156"></a><span class="lineno">  156</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00157" name="l00157"></a><span class="lineno">  157</span><span class="preprocessor">#define LL_PWR_CPU_MODE_CDSTOP        0x00000000U           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00158" name="l00158"></a><span class="lineno">  158</span><span class="preprocessor">#define LL_PWR_CPU_MODE_CDSTOP2       PWR_CPUCR_RETDS_CD    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00159" name="l00159"></a><span class="lineno">  159</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00160" name="l00160"></a><span class="lineno">  160</span> </div>
<div class="line"><a id="l00161" name="l00161"></a><span class="lineno">  161</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span></div>
<div class="line"><a id="l00162" name="l00162"></a><span class="lineno">  162</span><span class="preprocessor">#define LL_PWR_CPU_MODE_D2STOP        0x00000000U           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00163" name="l00163"></a><span class="lineno">  163</span><span class="preprocessor">#define LL_PWR_CPU_MODE_D2STANDBY     PWR_CPUCR_PDDS_D2     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00164" name="l00164"></a><span class="lineno">  164</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00165" name="l00165"></a><span class="lineno">  165</span> </div>
<div class="line"><a id="l00166" name="l00166"></a><span class="lineno">  166</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span></div>
<div class="line"><a id="l00167" name="l00167"></a><span class="lineno">  167</span><span class="preprocessor">#define LL_PWR_CPU_MODE_D3RUN         PWR_CPUCR_RUN_D3      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00168" name="l00168"></a><span class="lineno">  168</span><span class="preprocessor">#define LL_PWR_CPU_MODE_D3STOP        0x00000000U           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00169" name="l00169"></a><span class="lineno">  169</span><span class="preprocessor">#define LL_PWR_CPU_MODE_D3STANDBY     PWR_CPUCR_PDDS_D3     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00170" name="l00170"></a><span class="lineno">  170</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00171" name="l00171"></a><span class="lineno">  171</span><span class="preprocessor">#define LL_PWR_CPU_MODE_SRDRUN        PWR_CPUCR_RUN_SRD     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00172" name="l00172"></a><span class="lineno">  172</span><span class="preprocessor">#define LL_PWR_CPU_MODE_SRDSTOP       0x00000000U           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00173" name="l00173"></a><span class="lineno">  173</span><span class="preprocessor">#define LL_PWR_CPU_MODE_SRDSTANDBY    PWR_CPUCR_PDDS_SRD    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00174" name="l00174"></a><span class="lineno">  174</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00175" name="l00175"></a><span class="lineno">  175</span> </div>
<div class="line"><a id="l00176" name="l00176"></a><span class="lineno">  176</span><span class="preprocessor">#if defined (DUAL_CORE)</span></div>
<div class="line"><a id="l00177" name="l00177"></a><span class="lineno">  177</span><span class="preprocessor">#define LL_PWR_CPU2_MODE_D1STOP       0x00000000U           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00178" name="l00178"></a><span class="lineno">  178</span><span class="preprocessor">#define LL_PWR_CPU2_MODE_D1STANDBY    PWR_CPU2CR_PDDS_D1    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00179" name="l00179"></a><span class="lineno">  179</span><span class="preprocessor">#define LL_PWR_CPU2_MODE_D2STOP       0x00000000U           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00180" name="l00180"></a><span class="lineno">  180</span><span class="preprocessor">#define LL_PWR_CPU2_MODE_D2STANDBY    PWR_CPU2CR_PDDS_D2    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00181" name="l00181"></a><span class="lineno">  181</span><span class="preprocessor">#define LL_PWR_CPU2_MODE_D3RUN        PWR_CPU2CR_RUN_D3     </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00182" name="l00182"></a><span class="lineno">  182</span><span class="preprocessor">#define LL_PWR_CPU2_MODE_D3STOP       0x00000000U           </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00183" name="l00183"></a><span class="lineno">  183</span><span class="preprocessor">#define LL_PWR_CPU2_MODE_D3STANDBY    PWR_CPU2CR_PDDS_D3    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00184" name="l00184"></a><span class="lineno">  184</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00188" name="l00188"></a><span class="lineno">  188</span></div>
<div class="line"><a id="l00192" name="l00192"></a><span class="lineno">  192</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span></div>
<div class="line"><a id="l00193" name="l00193"></a><span class="lineno">  193</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SCALE3      PWR_D3CR_VOS_0                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00194" name="l00194"></a><span class="lineno">  194</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SCALE2      PWR_D3CR_VOS_1                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00195" name="l00195"></a><span class="lineno">  195</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SCALE1      (PWR_D3CR_VOS_0 | PWR_D3CR_VOS_1) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00196" name="l00196"></a><span class="lineno">  196</span><span class="preprocessor">#if defined (SYSCFG_PWRCR_ODEN) </span><span class="comment">/* STM32H74xxx and STM32H75xxx lines */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00197" name="l00197"></a><span class="lineno">  197</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SCALE0      (PWR_D3CR_VOS_0 | PWR_D3CR_VOS_1) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00198" name="l00198"></a><span class="lineno">  198</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00199" name="l00199"></a><span class="lineno">  199</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SCALE0      0x00000000U                       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00200" name="l00200"></a><span class="lineno">  200</span><span class="preprocessor">#endif </span><span class="comment">/* defined (SYSCFG_PWRCR_ODEN) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00201" name="l00201"></a><span class="lineno">  201</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l00202" name="l00202"></a><span class="lineno">  202</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SCALE3      0x00000000U                       </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00203" name="l00203"></a><span class="lineno">  203</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SCALE2      PWR_D3CR_VOS_0                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00204" name="l00204"></a><span class="lineno">  204</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SCALE1      PWR_D3CR_VOS_1                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00205" name="l00205"></a><span class="lineno">  205</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SCALE0      (PWR_D3CR_VOS_0 | PWR_D3CR_VOS_1) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00206" name="l00206"></a><span class="lineno">  206</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00210" name="l00210"></a><span class="lineno">  210</span></div>
<div class="line"><a id="l00214" name="l00214"></a><span class="lineno">  214</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SVOS_SCALE5   PWR_CR1_SVOS_0                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00215" name="l00215"></a><span class="lineno">  215</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SVOS_SCALE4   PWR_CR1_SVOS_1                    </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00216" name="l00216"></a><span class="lineno">  216</span><span class="preprocessor">#define LL_PWR_REGU_VOLTAGE_SVOS_SCALE3   (PWR_CR1_SVOS_0 | PWR_CR1_SVOS_1) </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00220" name="l00220"></a><span class="lineno">  220</span></div>
<div class="line"><a id="l00224" name="l00224"></a><span class="lineno">  224</span><span class="preprocessor">#define LL_PWR_REGU_DSMODE_MAIN           0x00000000U   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00225" name="l00225"></a><span class="lineno">  225</span><span class="preprocessor">#define LL_PWR_REGU_DSMODE_LOW_POWER      PWR_CR1_LPDS  </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00229" name="l00229"></a><span class="lineno">  229</span></div>
<div class="line"><a id="l00233" name="l00233"></a><span class="lineno">  233</span><span class="preprocessor">#define LL_PWR_PVDLEVEL_0   PWR_CR1_PLS_LEV0  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00234" name="l00234"></a><span class="lineno">  234</span><span class="preprocessor">#define LL_PWR_PVDLEVEL_1   PWR_CR1_PLS_LEV1  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00235" name="l00235"></a><span class="lineno">  235</span><span class="preprocessor">#define LL_PWR_PVDLEVEL_2   PWR_CR1_PLS_LEV2  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00236" name="l00236"></a><span class="lineno">  236</span><span class="preprocessor">#define LL_PWR_PVDLEVEL_3   PWR_CR1_PLS_LEV3  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00237" name="l00237"></a><span class="lineno">  237</span><span class="preprocessor">#define LL_PWR_PVDLEVEL_4   PWR_CR1_PLS_LEV4  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00238" name="l00238"></a><span class="lineno">  238</span><span class="preprocessor">#define LL_PWR_PVDLEVEL_5   PWR_CR1_PLS_LEV5  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00239" name="l00239"></a><span class="lineno">  239</span><span class="preprocessor">#define LL_PWR_PVDLEVEL_6   PWR_CR1_PLS_LEV6  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00240" name="l00240"></a><span class="lineno">  240</span><span class="preprocessor">#define LL_PWR_PVDLEVEL_7   PWR_CR1_PLS_LEV7  </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00244" name="l00244"></a><span class="lineno">  244</span></div>
<div class="line"><a id="l00248" name="l00248"></a><span class="lineno">  248</span><span class="preprocessor">#define LL_PWR_AVDLEVEL_0   PWR_CR1_ALS_LEV0  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00249" name="l00249"></a><span class="lineno">  249</span><span class="preprocessor">#define LL_PWR_AVDLEVEL_1   PWR_CR1_ALS_LEV1  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00250" name="l00250"></a><span class="lineno">  250</span><span class="preprocessor">#define LL_PWR_AVDLEVEL_2   PWR_CR1_ALS_LEV2  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00251" name="l00251"></a><span class="lineno">  251</span><span class="preprocessor">#define LL_PWR_AVDLEVEL_3   PWR_CR1_ALS_LEV3  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00252" name="l00252"></a><span class="lineno">  252</span></div>
<div class="line"><a id="l00256" name="l00256"></a><span class="lineno">  256</span></div>
<div class="line"><a id="l00260" name="l00260"></a><span class="lineno">  260</span><span class="preprocessor">#define LL_PWR_BATT_CHARG_RESISTOR_5K     0x00000000U   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00261" name="l00261"></a><span class="lineno">  261</span><span class="preprocessor">#define LL_PWR_BATT_CHARGRESISTOR_1_5K    PWR_CR3_VBRS  </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00265" name="l00265"></a><span class="lineno">  265</span></div>
<div class="line"><a id="l00269" name="l00269"></a><span class="lineno">  269</span><span class="preprocessor">#define LL_PWR_WAKEUP_PIN1    PWR_WKUPEPR_WKUPEN1  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00270" name="l00270"></a><span class="lineno">  270</span><span class="preprocessor">#define LL_PWR_WAKEUP_PIN2    PWR_WKUPEPR_WKUPEN2  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00271" name="l00271"></a><span class="lineno">  271</span><span class="preprocessor">#if defined (PWR_WKUPEPR_WKUPEN3)</span></div>
<div class="line"><a id="l00272" name="l00272"></a><span class="lineno">  272</span><span class="preprocessor">#define LL_PWR_WAKEUP_PIN3    PWR_WKUPEPR_WKUPEN3  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00273" name="l00273"></a><span class="lineno">  273</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPEPR_WKUPEN3) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00274" name="l00274"></a><span class="lineno">  274</span><span class="preprocessor">#define LL_PWR_WAKEUP_PIN4    PWR_WKUPEPR_WKUPEN4  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00275" name="l00275"></a><span class="lineno">  275</span><span class="preprocessor">#if defined (PWR_WKUPEPR_WKUPEN5)</span></div>
<div class="line"><a id="l00276" name="l00276"></a><span class="lineno">  276</span><span class="preprocessor">#define LL_PWR_WAKEUP_PIN5    PWR_WKUPEPR_WKUPEN5  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00277" name="l00277"></a><span class="lineno">  277</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPEPR_WKUPEN5) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00278" name="l00278"></a><span class="lineno">  278</span><span class="preprocessor">#define LL_PWR_WAKEUP_PIN6    PWR_WKUPEPR_WKUPEN6  </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00282" name="l00282"></a><span class="lineno">  282</span></div>
<div class="line"><a id="l00286" name="l00286"></a><span class="lineno">  286</span><span class="preprocessor">#define LL_PWR_WAKEUP_PIN_NOPULL      0x00000000UL   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00287" name="l00287"></a><span class="lineno">  287</span><span class="preprocessor">#define LL_PWR_WAKEUP_PIN_PULLUP      0x00000001UL   </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00288" name="l00288"></a><span class="lineno">  288</span><span class="preprocessor">#define LL_PWR_WAKEUP_PIN_PULLDOWN    0x00000002UL   </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00292" name="l00292"></a><span class="lineno">  292</span></div>
<div class="line"><a id="l00296" name="l00296"></a><span class="lineno">  296</span><span class="preprocessor">#define LL_PWR_LDO_SUPPLY                     PWR_CR3_LDOEN                                                               </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00297" name="l00297"></a><span class="lineno">  297</span><span class="preprocessor">#if defined (SMPS)</span></div>
<div class="line"><a id="l00298" name="l00298"></a><span class="lineno">  298</span><span class="preprocessor">#define LL_PWR_DIRECT_SMPS_SUPPLY             PWR_CR3_SMPSEN                                                              </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00299" name="l00299"></a><span class="lineno">  299</span><span class="preprocessor">#define LL_PWR_SMPS_1V8_SUPPLIES_LDO          (PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN)                      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00300" name="l00300"></a><span class="lineno">  300</span><span class="preprocessor">#define LL_PWR_SMPS_2V5_SUPPLIES_LDO          (PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEN | PWR_CR3_LDOEN)                      </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00301" name="l00301"></a><span class="lineno">  301</span><span class="preprocessor">#define LL_PWR_SMPS_1V8_SUPPLIES_EXT_AND_LDO  (PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN)  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00302" name="l00302"></a><span class="lineno">  302</span><span class="preprocessor">#define LL_PWR_SMPS_2V5_SUPPLIES_EXT_AND_LDO  (PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_LDOEN)  </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00303" name="l00303"></a><span class="lineno">  303</span><span class="preprocessor">#define LL_PWR_SMPS_1V8_SUPPLIES_EXT          (PWR_CR3_SMPSLEVEL_0 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00304" name="l00304"></a><span class="lineno">  304</span><span class="preprocessor">#define LL_PWR_SMPS_2V5_SUPPLIES_EXT          (PWR_CR3_SMPSLEVEL_1 | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | PWR_CR3_BYPASS) </span><span class="preprocessor"></span></div>
<div class="line"><a id="l00305" name="l00305"></a><span class="lineno">  305</span><span class="preprocessor">#endif </span><span class="comment">/* SMPS */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00306" name="l00306"></a><span class="lineno">  306</span><span class="preprocessor">#define LL_PWR_EXTERNAL_SOURCE_SUPPLY         PWR_CR3_BYPASS                                                              </span><span class="preprocessor"></span><span class="preprocessor"></span></div>
<div class="line"><a id="l00310" name="l00310"></a><span class="lineno">  310</span></div>
<div class="line"><a id="l00314" name="l00314"></a><span class="lineno">  314</span><span class="comment">/* Exported macro ------------------------------------------------------------*/</span></div>
<div class="line"><a id="l00318" name="l00318"></a><span class="lineno">  318</span></div>
<div class="line"><a id="l00322" name="l00322"></a><span class="lineno">  322</span></div>
<div class="line"><a id="l00329" name="l00329"></a><span class="lineno">  329</span><span class="preprocessor">#define LL_PWR_WriteReg(__REG__, __VALUE__) WRITE_REG(PWR-&gt;__REG__, (__VALUE__))</span></div>
<div class="line"><a id="l00330" name="l00330"></a><span class="lineno">  330</span></div>
<div class="line"><a id="l00336" name="l00336"></a><span class="lineno">  336</span><span class="preprocessor">#define LL_PWR_ReadReg(__REG__) READ_REG(PWR-&gt;__REG__)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00340" name="l00340"></a><span class="lineno">  340</span></div>
<div class="line"><a id="l00344" name="l00344"></a><span class="lineno">  344</span><span class="comment">/* Exported functions --------------------------------------------------------*/</span></div>
<div class="line"><a id="l00348" name="l00348"></a><span class="lineno">  348</span></div>
<div class="line"><a id="l00352" name="l00352"></a><span class="lineno">  352</span></div>
<div class="line"><a id="l00361" name="l00361"></a><span class="lineno">  361</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetRegulModeDS(uint32_t RegulMode)</div>
<div class="line"><a id="l00362" name="l00362"></a><span class="lineno">  362</span>{</div>
<div class="line"><a id="l00363" name="l00363"></a><span class="lineno">  363</span>  MODIFY_REG(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacc60f674740c4000a25b0e3e50ede47d">PWR_CR1_LPDS</a>, RegulMode);</div>
<div class="line"><a id="l00364" name="l00364"></a><span class="lineno">  364</span>}</div>
<div class="line"><a id="l00365" name="l00365"></a><span class="lineno">  365</span></div>
<div class="line"><a id="l00373" name="l00373"></a><span class="lineno">  373</span>__STATIC_INLINE uint32_t LL_PWR_GetRegulModeDS(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00374" name="l00374"></a><span class="lineno">  374</span>{</div>
<div class="line"><a id="l00375" name="l00375"></a><span class="lineno">  375</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacc60f674740c4000a25b0e3e50ede47d">PWR_CR1_LPDS</a>));</div>
<div class="line"><a id="l00376" name="l00376"></a><span class="lineno">  376</span>}</div>
<div class="line"><a id="l00377" name="l00377"></a><span class="lineno">  377</span></div>
<div class="line"><a id="l00383" name="l00383"></a><span class="lineno">  383</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnablePVD(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00384" name="l00384"></a><span class="lineno">  384</span>{</div>
<div class="line"><a id="l00385" name="l00385"></a><span class="lineno">  385</span>  SET_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac8d2a44a38ed8ca33fdf883344065bd2">PWR_CR1_PVDEN</a>);</div>
<div class="line"><a id="l00386" name="l00386"></a><span class="lineno">  386</span>}</div>
<div class="line"><a id="l00387" name="l00387"></a><span class="lineno">  387</span></div>
<div class="line"><a id="l00393" name="l00393"></a><span class="lineno">  393</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisablePVD(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00394" name="l00394"></a><span class="lineno">  394</span>{</div>
<div class="line"><a id="l00395" name="l00395"></a><span class="lineno">  395</span>  CLEAR_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac8d2a44a38ed8ca33fdf883344065bd2">PWR_CR1_PVDEN</a>);</div>
<div class="line"><a id="l00396" name="l00396"></a><span class="lineno">  396</span>}</div>
<div class="line"><a id="l00397" name="l00397"></a><span class="lineno">  397</span></div>
<div class="line"><a id="l00403" name="l00403"></a><span class="lineno">  403</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledPVD(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00404" name="l00404"></a><span class="lineno">  404</span>{</div>
<div class="line"><a id="l00405" name="l00405"></a><span class="lineno">  405</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac8d2a44a38ed8ca33fdf883344065bd2">PWR_CR1_PVDEN</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gac8d2a44a38ed8ca33fdf883344065bd2">PWR_CR1_PVDEN</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00406" name="l00406"></a><span class="lineno">  406</span>}</div>
<div class="line"><a id="l00407" name="l00407"></a><span class="lineno">  407</span></div>
<div class="line"><a id="l00422" name="l00422"></a><span class="lineno">  422</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetPVDLevel(uint32_t PVDLevel)</div>
<div class="line"><a id="l00423" name="l00423"></a><span class="lineno">  423</span>{</div>
<div class="line"><a id="l00424" name="l00424"></a><span class="lineno">  424</span>  MODIFY_REG(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaf8de82702acc1034f6061ed9d70ec67f">PWR_CR1_PLS</a>, PVDLevel);</div>
<div class="line"><a id="l00425" name="l00425"></a><span class="lineno">  425</span>}</div>
<div class="line"><a id="l00426" name="l00426"></a><span class="lineno">  426</span></div>
<div class="line"><a id="l00440" name="l00440"></a><span class="lineno">  440</span>__STATIC_INLINE uint32_t LL_PWR_GetPVDLevel(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00441" name="l00441"></a><span class="lineno">  441</span>{</div>
<div class="line"><a id="l00442" name="l00442"></a><span class="lineno">  442</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaf8de82702acc1034f6061ed9d70ec67f">PWR_CR1_PLS</a>));</div>
<div class="line"><a id="l00443" name="l00443"></a><span class="lineno">  443</span>}</div>
<div class="line"><a id="l00444" name="l00444"></a><span class="lineno">  444</span></div>
<div class="line"><a id="l00450" name="l00450"></a><span class="lineno">  450</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableBkUpAccess(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00451" name="l00451"></a><span class="lineno">  451</span>{</div>
<div class="line"><a id="l00452" name="l00452"></a><span class="lineno">  452</span>  SET_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga09950f76d292eb9d01f72dd825082f1b">PWR_CR1_DBP</a>);</div>
<div class="line"><a id="l00453" name="l00453"></a><span class="lineno">  453</span>}</div>
<div class="line"><a id="l00454" name="l00454"></a><span class="lineno">  454</span></div>
<div class="line"><a id="l00460" name="l00460"></a><span class="lineno">  460</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableBkUpAccess(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00461" name="l00461"></a><span class="lineno">  461</span>{</div>
<div class="line"><a id="l00462" name="l00462"></a><span class="lineno">  462</span>  CLEAR_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga09950f76d292eb9d01f72dd825082f1b">PWR_CR1_DBP</a>);</div>
<div class="line"><a id="l00463" name="l00463"></a><span class="lineno">  463</span>}</div>
<div class="line"><a id="l00464" name="l00464"></a><span class="lineno">  464</span></div>
<div class="line"><a id="l00470" name="l00470"></a><span class="lineno">  470</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpAccess(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00471" name="l00471"></a><span class="lineno">  471</span>{</div>
<div class="line"><a id="l00472" name="l00472"></a><span class="lineno">  472</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga09950f76d292eb9d01f72dd825082f1b">PWR_CR1_DBP</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga09950f76d292eb9d01f72dd825082f1b">PWR_CR1_DBP</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00473" name="l00473"></a><span class="lineno">  473</span>}</div>
<div class="line"><a id="l00474" name="l00474"></a><span class="lineno">  474</span></div>
<div class="line"><a id="l00480" name="l00480"></a><span class="lineno">  480</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableFlashPowerDown(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00481" name="l00481"></a><span class="lineno">  481</span>{</div>
<div class="line"><a id="l00482" name="l00482"></a><span class="lineno">  482</span>  SET_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga26543bcca0e8dac03aaa2acd0afd4e2c">PWR_CR1_FLPS</a>);</div>
<div class="line"><a id="l00483" name="l00483"></a><span class="lineno">  483</span>}</div>
<div class="line"><a id="l00484" name="l00484"></a><span class="lineno">  484</span></div>
<div class="line"><a id="l00490" name="l00490"></a><span class="lineno">  490</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableFlashPowerDown(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00491" name="l00491"></a><span class="lineno">  491</span>{</div>
<div class="line"><a id="l00492" name="l00492"></a><span class="lineno">  492</span>  CLEAR_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga26543bcca0e8dac03aaa2acd0afd4e2c">PWR_CR1_FLPS</a>);</div>
<div class="line"><a id="l00493" name="l00493"></a><span class="lineno">  493</span>}</div>
<div class="line"><a id="l00494" name="l00494"></a><span class="lineno">  494</span></div>
<div class="line"><a id="l00500" name="l00500"></a><span class="lineno">  500</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledFlashPowerDown(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00501" name="l00501"></a><span class="lineno">  501</span>{</div>
<div class="line"><a id="l00502" name="l00502"></a><span class="lineno">  502</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga26543bcca0e8dac03aaa2acd0afd4e2c">PWR_CR1_FLPS</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga26543bcca0e8dac03aaa2acd0afd4e2c">PWR_CR1_FLPS</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00503" name="l00503"></a><span class="lineno">  503</span>}</div>
<div class="line"><a id="l00504" name="l00504"></a><span class="lineno">  504</span> </div>
<div class="line"><a id="l00505" name="l00505"></a><span class="lineno">  505</span><span class="preprocessor">#if defined (PWR_CR1_BOOSTE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00511" name="l00511"></a><span class="lineno">  511</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableAnalogBooster(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00512" name="l00512"></a><span class="lineno">  512</span>{</div>
<div class="line"><a id="l00513" name="l00513"></a><span class="lineno">  513</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_BOOSTE);</div>
<div class="line"><a id="l00514" name="l00514"></a><span class="lineno">  514</span>}</div>
<div class="line"><a id="l00515" name="l00515"></a><span class="lineno">  515</span></div>
<div class="line"><a id="l00521" name="l00521"></a><span class="lineno">  521</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableAnalogBooster(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00522" name="l00522"></a><span class="lineno">  522</span>{</div>
<div class="line"><a id="l00523" name="l00523"></a><span class="lineno">  523</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_BOOSTE);</div>
<div class="line"><a id="l00524" name="l00524"></a><span class="lineno">  524</span>}</div>
<div class="line"><a id="l00525" name="l00525"></a><span class="lineno">  525</span></div>
<div class="line"><a id="l00531" name="l00531"></a><span class="lineno">  531</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledAnalogBooster(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00532" name="l00532"></a><span class="lineno">  532</span>{</div>
<div class="line"><a id="l00533" name="l00533"></a><span class="lineno">  533</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_BOOSTE) == (PWR_CR1_BOOSTE)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00534" name="l00534"></a><span class="lineno">  534</span>}</div>
<div class="line"><a id="l00535" name="l00535"></a><span class="lineno">  535</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_BOOSTE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00536" name="l00536"></a><span class="lineno">  536</span> </div>
<div class="line"><a id="l00537" name="l00537"></a><span class="lineno">  537</span><span class="preprocessor">#if defined (PWR_CR1_AVD_READY)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00543" name="l00543"></a><span class="lineno">  543</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableAnalogVoltageReady(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00544" name="l00544"></a><span class="lineno">  544</span>{</div>
<div class="line"><a id="l00545" name="l00545"></a><span class="lineno">  545</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_AVD_READY);</div>
<div class="line"><a id="l00546" name="l00546"></a><span class="lineno">  546</span>}</div>
<div class="line"><a id="l00547" name="l00547"></a><span class="lineno">  547</span></div>
<div class="line"><a id="l00553" name="l00553"></a><span class="lineno">  553</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableAnalogVoltageReady(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00554" name="l00554"></a><span class="lineno">  554</span>{</div>
<div class="line"><a id="l00555" name="l00555"></a><span class="lineno">  555</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_AVD_READY);</div>
<div class="line"><a id="l00556" name="l00556"></a><span class="lineno">  556</span>}</div>
<div class="line"><a id="l00557" name="l00557"></a><span class="lineno">  557</span></div>
<div class="line"><a id="l00563" name="l00563"></a><span class="lineno">  563</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledAnalogVoltageReady(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00564" name="l00564"></a><span class="lineno">  564</span>{</div>
<div class="line"><a id="l00565" name="l00565"></a><span class="lineno">  565</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_AVD_READY) == (PWR_CR1_AVD_READY)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00566" name="l00566"></a><span class="lineno">  566</span>}</div>
<div class="line"><a id="l00567" name="l00567"></a><span class="lineno">  567</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_AVD_READY */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00568" name="l00568"></a><span class="lineno">  568</span></div>
<div class="line"><a id="l00578" name="l00578"></a><span class="lineno">  578</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetStopModeRegulVoltageScaling(uint32_t VoltageScaling)</div>
<div class="line"><a id="l00579" name="l00579"></a><span class="lineno">  579</span>{</div>
<div class="line"><a id="l00580" name="l00580"></a><span class="lineno">  580</span>  MODIFY_REG(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga2d0305ff376903b25be0c2b855b54766">PWR_CR1_SVOS</a>, VoltageScaling);</div>
<div class="line"><a id="l00581" name="l00581"></a><span class="lineno">  581</span>}</div>
<div class="line"><a id="l00582" name="l00582"></a><span class="lineno">  582</span></div>
<div class="line"><a id="l00591" name="l00591"></a><span class="lineno">  591</span>__STATIC_INLINE uint32_t LL_PWR_GetStopModeRegulVoltageScaling(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00592" name="l00592"></a><span class="lineno">  592</span>{</div>
<div class="line"><a id="l00593" name="l00593"></a><span class="lineno">  593</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga2d0305ff376903b25be0c2b855b54766">PWR_CR1_SVOS</a>));</div>
<div class="line"><a id="l00594" name="l00594"></a><span class="lineno">  594</span>}</div>
<div class="line"><a id="l00595" name="l00595"></a><span class="lineno">  595</span></div>
<div class="line"><a id="l00601" name="l00601"></a><span class="lineno">  601</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableAVD(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00602" name="l00602"></a><span class="lineno">  602</span>{</div>
<div class="line"><a id="l00603" name="l00603"></a><span class="lineno">  603</span>  SET_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae5d3657986e2d92c7f5f72f4422b0a52">PWR_CR1_AVDEN</a>);</div>
<div class="line"><a id="l00604" name="l00604"></a><span class="lineno">  604</span>}</div>
<div class="line"><a id="l00605" name="l00605"></a><span class="lineno">  605</span></div>
<div class="line"><a id="l00611" name="l00611"></a><span class="lineno">  611</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableAVD(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00612" name="l00612"></a><span class="lineno">  612</span>{</div>
<div class="line"><a id="l00613" name="l00613"></a><span class="lineno">  613</span>  CLEAR_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae5d3657986e2d92c7f5f72f4422b0a52">PWR_CR1_AVDEN</a>);</div>
<div class="line"><a id="l00614" name="l00614"></a><span class="lineno">  614</span>}</div>
<div class="line"><a id="l00615" name="l00615"></a><span class="lineno">  615</span></div>
<div class="line"><a id="l00621" name="l00621"></a><span class="lineno">  621</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledAVD(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00622" name="l00622"></a><span class="lineno">  622</span>{</div>
<div class="line"><a id="l00623" name="l00623"></a><span class="lineno">  623</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae5d3657986e2d92c7f5f72f4422b0a52">PWR_CR1_AVDEN</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae5d3657986e2d92c7f5f72f4422b0a52">PWR_CR1_AVDEN</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00624" name="l00624"></a><span class="lineno">  624</span>}</div>
<div class="line"><a id="l00625" name="l00625"></a><span class="lineno">  625</span></div>
<div class="line"><a id="l00636" name="l00636"></a><span class="lineno">  636</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetAVDLevel(uint32_t AVDLevel)</div>
<div class="line"><a id="l00637" name="l00637"></a><span class="lineno">  637</span>{</div>
<div class="line"><a id="l00638" name="l00638"></a><span class="lineno">  638</span>  MODIFY_REG(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga52667346e07a0e002e149f8e5424f44d">PWR_CR1_ALS</a>, AVDLevel);</div>
<div class="line"><a id="l00639" name="l00639"></a><span class="lineno">  639</span>}</div>
<div class="line"><a id="l00640" name="l00640"></a><span class="lineno">  640</span></div>
<div class="line"><a id="l00650" name="l00650"></a><span class="lineno">  650</span>__STATIC_INLINE uint32_t LL_PWR_GetAVDLevel(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00651" name="l00651"></a><span class="lineno">  651</span>{</div>
<div class="line"><a id="l00652" name="l00652"></a><span class="lineno">  652</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga52667346e07a0e002e149f8e5424f44d">PWR_CR1_ALS</a>));</div>
<div class="line"><a id="l00653" name="l00653"></a><span class="lineno">  653</span>}</div>
<div class="line"><a id="l00654" name="l00654"></a><span class="lineno">  654</span> </div>
<div class="line"><a id="l00655" name="l00655"></a><span class="lineno">  655</span><span class="preprocessor">#if defined (PWR_CR1_AXIRAM1SO)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00661" name="l00661"></a><span class="lineno">  661</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableAXIRAM1ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00662" name="l00662"></a><span class="lineno">  662</span>{</div>
<div class="line"><a id="l00663" name="l00663"></a><span class="lineno">  663</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_AXIRAM1SO);</div>
<div class="line"><a id="l00664" name="l00664"></a><span class="lineno">  664</span>}</div>
<div class="line"><a id="l00665" name="l00665"></a><span class="lineno">  665</span></div>
<div class="line"><a id="l00671" name="l00671"></a><span class="lineno">  671</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableAXIRAM1ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00672" name="l00672"></a><span class="lineno">  672</span>{</div>
<div class="line"><a id="l00673" name="l00673"></a><span class="lineno">  673</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_AXIRAM1SO);</div>
<div class="line"><a id="l00674" name="l00674"></a><span class="lineno">  674</span>}</div>
<div class="line"><a id="l00675" name="l00675"></a><span class="lineno">  675</span></div>
<div class="line"><a id="l00681" name="l00681"></a><span class="lineno">  681</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledAXIRAM1ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00682" name="l00682"></a><span class="lineno">  682</span>{</div>
<div class="line"><a id="l00683" name="l00683"></a><span class="lineno">  683</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_AXIRAM1SO) == (PWR_CR1_AXIRAM1SO)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00684" name="l00684"></a><span class="lineno">  684</span>}</div>
<div class="line"><a id="l00685" name="l00685"></a><span class="lineno">  685</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_AXIRAM1SO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00686" name="l00686"></a><span class="lineno">  686</span> </div>
<div class="line"><a id="l00687" name="l00687"></a><span class="lineno">  687</span><span class="preprocessor">#if defined (PWR_CR1_AXIRAM2SO)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00693" name="l00693"></a><span class="lineno">  693</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableAXIRAM2ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00694" name="l00694"></a><span class="lineno">  694</span>{</div>
<div class="line"><a id="l00695" name="l00695"></a><span class="lineno">  695</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_AXIRAM2SO);</div>
<div class="line"><a id="l00696" name="l00696"></a><span class="lineno">  696</span>}</div>
<div class="line"><a id="l00697" name="l00697"></a><span class="lineno">  697</span></div>
<div class="line"><a id="l00703" name="l00703"></a><span class="lineno">  703</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableAXIRAM2ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00704" name="l00704"></a><span class="lineno">  704</span>{</div>
<div class="line"><a id="l00705" name="l00705"></a><span class="lineno">  705</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_AXIRAM2SO);</div>
<div class="line"><a id="l00706" name="l00706"></a><span class="lineno">  706</span>}</div>
<div class="line"><a id="l00707" name="l00707"></a><span class="lineno">  707</span></div>
<div class="line"><a id="l00713" name="l00713"></a><span class="lineno">  713</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledAXIRAM2ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00714" name="l00714"></a><span class="lineno">  714</span>{</div>
<div class="line"><a id="l00715" name="l00715"></a><span class="lineno">  715</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_AXIRAM2SO) == (PWR_CR1_AXIRAM2SO)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00716" name="l00716"></a><span class="lineno">  716</span>}</div>
<div class="line"><a id="l00717" name="l00717"></a><span class="lineno">  717</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_AXIRAM2SO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00718" name="l00718"></a><span class="lineno">  718</span> </div>
<div class="line"><a id="l00719" name="l00719"></a><span class="lineno">  719</span><span class="preprocessor">#if defined (PWR_CR1_AXIRAM3SO)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00725" name="l00725"></a><span class="lineno">  725</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableAXIRAM3ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00726" name="l00726"></a><span class="lineno">  726</span>{</div>
<div class="line"><a id="l00727" name="l00727"></a><span class="lineno">  727</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_AXIRAM3SO);</div>
<div class="line"><a id="l00728" name="l00728"></a><span class="lineno">  728</span>}</div>
<div class="line"><a id="l00729" name="l00729"></a><span class="lineno">  729</span></div>
<div class="line"><a id="l00735" name="l00735"></a><span class="lineno">  735</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableAXIRAM3ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00736" name="l00736"></a><span class="lineno">  736</span>{</div>
<div class="line"><a id="l00737" name="l00737"></a><span class="lineno">  737</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_AXIRAM3SO);</div>
<div class="line"><a id="l00738" name="l00738"></a><span class="lineno">  738</span>}</div>
<div class="line"><a id="l00739" name="l00739"></a><span class="lineno">  739</span></div>
<div class="line"><a id="l00745" name="l00745"></a><span class="lineno">  745</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledAXIRAM3ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00746" name="l00746"></a><span class="lineno">  746</span>{</div>
<div class="line"><a id="l00747" name="l00747"></a><span class="lineno">  747</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_AXIRAM3SO) == (PWR_CR1_AXIRAM3SO)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00748" name="l00748"></a><span class="lineno">  748</span>}</div>
<div class="line"><a id="l00749" name="l00749"></a><span class="lineno">  749</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_AXIRAM3SO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00750" name="l00750"></a><span class="lineno">  750</span> </div>
<div class="line"><a id="l00751" name="l00751"></a><span class="lineno">  751</span><span class="preprocessor">#if defined (PWR_CR1_AHBRAM1SO)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00757" name="l00757"></a><span class="lineno">  757</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableAHBRAM1ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00758" name="l00758"></a><span class="lineno">  758</span>{</div>
<div class="line"><a id="l00759" name="l00759"></a><span class="lineno">  759</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_AHBRAM1SO);</div>
<div class="line"><a id="l00760" name="l00760"></a><span class="lineno">  760</span>}</div>
<div class="line"><a id="l00761" name="l00761"></a><span class="lineno">  761</span></div>
<div class="line"><a id="l00767" name="l00767"></a><span class="lineno">  767</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableAHBRAM1ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00768" name="l00768"></a><span class="lineno">  768</span>{</div>
<div class="line"><a id="l00769" name="l00769"></a><span class="lineno">  769</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_AHBRAM1SO);</div>
<div class="line"><a id="l00770" name="l00770"></a><span class="lineno">  770</span>}</div>
<div class="line"><a id="l00771" name="l00771"></a><span class="lineno">  771</span></div>
<div class="line"><a id="l00777" name="l00777"></a><span class="lineno">  777</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledAHBRAM1ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00778" name="l00778"></a><span class="lineno">  778</span>{</div>
<div class="line"><a id="l00779" name="l00779"></a><span class="lineno">  779</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_AHBRAM1SO) == (PWR_CR1_AHBRAM1SO)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00780" name="l00780"></a><span class="lineno">  780</span>}</div>
<div class="line"><a id="l00781" name="l00781"></a><span class="lineno">  781</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_AHBRAM1SO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00782" name="l00782"></a><span class="lineno">  782</span> </div>
<div class="line"><a id="l00783" name="l00783"></a><span class="lineno">  783</span><span class="preprocessor">#if defined (PWR_CR1_AHBRAM2SO)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00789" name="l00789"></a><span class="lineno">  789</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableAHBRAM2ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00790" name="l00790"></a><span class="lineno">  790</span>{</div>
<div class="line"><a id="l00791" name="l00791"></a><span class="lineno">  791</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_AHBRAM2SO);</div>
<div class="line"><a id="l00792" name="l00792"></a><span class="lineno">  792</span>}</div>
<div class="line"><a id="l00793" name="l00793"></a><span class="lineno">  793</span></div>
<div class="line"><a id="l00799" name="l00799"></a><span class="lineno">  799</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableAHBRAM2ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00800" name="l00800"></a><span class="lineno">  800</span>{</div>
<div class="line"><a id="l00801" name="l00801"></a><span class="lineno">  801</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_AHBRAM2SO);</div>
<div class="line"><a id="l00802" name="l00802"></a><span class="lineno">  802</span>}</div>
<div class="line"><a id="l00803" name="l00803"></a><span class="lineno">  803</span></div>
<div class="line"><a id="l00809" name="l00809"></a><span class="lineno">  809</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledAHBRAM2ShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00810" name="l00810"></a><span class="lineno">  810</span>{</div>
<div class="line"><a id="l00811" name="l00811"></a><span class="lineno">  811</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_AHBRAM2SO) == (PWR_CR1_AHBRAM2SO)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00812" name="l00812"></a><span class="lineno">  812</span>}</div>
<div class="line"><a id="l00813" name="l00813"></a><span class="lineno">  813</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_AHBRAM2SO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00814" name="l00814"></a><span class="lineno">  814</span> </div>
<div class="line"><a id="l00815" name="l00815"></a><span class="lineno">  815</span><span class="preprocessor">#if defined (PWR_CR1_ITCMSO)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00821" name="l00821"></a><span class="lineno">  821</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableITCMSOShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00822" name="l00822"></a><span class="lineno">  822</span>{</div>
<div class="line"><a id="l00823" name="l00823"></a><span class="lineno">  823</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_ITCMSO);</div>
<div class="line"><a id="l00824" name="l00824"></a><span class="lineno">  824</span>}</div>
<div class="line"><a id="l00825" name="l00825"></a><span class="lineno">  825</span></div>
<div class="line"><a id="l00831" name="l00831"></a><span class="lineno">  831</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableITCMSOShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00832" name="l00832"></a><span class="lineno">  832</span>{</div>
<div class="line"><a id="l00833" name="l00833"></a><span class="lineno">  833</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_ITCMSO);</div>
<div class="line"><a id="l00834" name="l00834"></a><span class="lineno">  834</span>}</div>
<div class="line"><a id="l00835" name="l00835"></a><span class="lineno">  835</span></div>
<div class="line"><a id="l00841" name="l00841"></a><span class="lineno">  841</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledITCMShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00842" name="l00842"></a><span class="lineno">  842</span>{</div>
<div class="line"><a id="l00843" name="l00843"></a><span class="lineno">  843</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_ITCMSO) == (PWR_CR1_ITCMSO)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00844" name="l00844"></a><span class="lineno">  844</span>}</div>
<div class="line"><a id="l00845" name="l00845"></a><span class="lineno">  845</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_ITCMSO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00846" name="l00846"></a><span class="lineno">  846</span> </div>
<div class="line"><a id="l00847" name="l00847"></a><span class="lineno">  847</span><span class="preprocessor">#if defined (PWR_CR1_HSITFSO)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00853" name="l00853"></a><span class="lineno">  853</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableHSITFShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00854" name="l00854"></a><span class="lineno">  854</span>{</div>
<div class="line"><a id="l00855" name="l00855"></a><span class="lineno">  855</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_HSITFSO);</div>
<div class="line"><a id="l00856" name="l00856"></a><span class="lineno">  856</span>}</div>
<div class="line"><a id="l00857" name="l00857"></a><span class="lineno">  857</span></div>
<div class="line"><a id="l00863" name="l00863"></a><span class="lineno">  863</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableHSITFShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00864" name="l00864"></a><span class="lineno">  864</span>{</div>
<div class="line"><a id="l00865" name="l00865"></a><span class="lineno">  865</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_HSITFSO);</div>
<div class="line"><a id="l00866" name="l00866"></a><span class="lineno">  866</span>}</div>
<div class="line"><a id="l00867" name="l00867"></a><span class="lineno">  867</span></div>
<div class="line"><a id="l00873" name="l00873"></a><span class="lineno">  873</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledHSITFShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00874" name="l00874"></a><span class="lineno">  874</span>{</div>
<div class="line"><a id="l00875" name="l00875"></a><span class="lineno">  875</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_HSITFSO) == (PWR_CR1_HSITFSO)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00876" name="l00876"></a><span class="lineno">  876</span>}</div>
<div class="line"><a id="l00877" name="l00877"></a><span class="lineno">  877</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_HSITFSO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00878" name="l00878"></a><span class="lineno">  878</span> </div>
<div class="line"><a id="l00879" name="l00879"></a><span class="lineno">  879</span><span class="preprocessor">#if defined (PWR_CR1_SRDRAMSO)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00885" name="l00885"></a><span class="lineno">  885</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableSRDRAMShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00886" name="l00886"></a><span class="lineno">  886</span>{</div>
<div class="line"><a id="l00887" name="l00887"></a><span class="lineno">  887</span>  SET_BIT(PWR-&gt;CR1, PWR_CR1_SRDRAMSO);</div>
<div class="line"><a id="l00888" name="l00888"></a><span class="lineno">  888</span>}</div>
<div class="line"><a id="l00889" name="l00889"></a><span class="lineno">  889</span></div>
<div class="line"><a id="l00895" name="l00895"></a><span class="lineno">  895</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableSRDRAMShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00896" name="l00896"></a><span class="lineno">  896</span>{</div>
<div class="line"><a id="l00897" name="l00897"></a><span class="lineno">  897</span>  CLEAR_BIT(PWR-&gt;CR1, PWR_CR1_SRDRAMSO);</div>
<div class="line"><a id="l00898" name="l00898"></a><span class="lineno">  898</span>}</div>
<div class="line"><a id="l00899" name="l00899"></a><span class="lineno">  899</span></div>
<div class="line"><a id="l00905" name="l00905"></a><span class="lineno">  905</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledSRDRAMShutOff(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00906" name="l00906"></a><span class="lineno">  906</span>{</div>
<div class="line"><a id="l00907" name="l00907"></a><span class="lineno">  907</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR1, PWR_CR1_SRDRAMSO) == (PWR_CR1_SRDRAMSO)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00908" name="l00908"></a><span class="lineno">  908</span>}</div>
<div class="line"><a id="l00909" name="l00909"></a><span class="lineno">  909</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CR1_SRDRAMSO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00910" name="l00910"></a><span class="lineno">  910</span></div>
<div class="line"><a id="l00921" name="l00921"></a><span class="lineno">  921</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableBkUpRegulator(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00922" name="l00922"></a><span class="lineno">  922</span>{</div>
<div class="line"><a id="l00923" name="l00923"></a><span class="lineno">  923</span>  SET_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga8387ab1b7dc6a1d8de702c6bc899c620">PWR_CR2_BREN</a>);</div>
<div class="line"><a id="l00924" name="l00924"></a><span class="lineno">  924</span>}</div>
<div class="line"><a id="l00925" name="l00925"></a><span class="lineno">  925</span></div>
<div class="line"><a id="l00931" name="l00931"></a><span class="lineno">  931</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableBkUpRegulator(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00932" name="l00932"></a><span class="lineno">  932</span>{</div>
<div class="line"><a id="l00933" name="l00933"></a><span class="lineno">  933</span>  CLEAR_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga8387ab1b7dc6a1d8de702c6bc899c620">PWR_CR2_BREN</a>);</div>
<div class="line"><a id="l00934" name="l00934"></a><span class="lineno">  934</span>}</div>
<div class="line"><a id="l00935" name="l00935"></a><span class="lineno">  935</span></div>
<div class="line"><a id="l00941" name="l00941"></a><span class="lineno">  941</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledBkUpRegulator(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00942" name="l00942"></a><span class="lineno">  942</span>{</div>
<div class="line"><a id="l00943" name="l00943"></a><span class="lineno">  943</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga8387ab1b7dc6a1d8de702c6bc899c620">PWR_CR2_BREN</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga8387ab1b7dc6a1d8de702c6bc899c620">PWR_CR2_BREN</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00944" name="l00944"></a><span class="lineno">  944</span>}</div>
<div class="line"><a id="l00945" name="l00945"></a><span class="lineno">  945</span></div>
<div class="line"><a id="l00951" name="l00951"></a><span class="lineno">  951</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableMonitoring(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00952" name="l00952"></a><span class="lineno">  952</span>{</div>
<div class="line"><a id="l00953" name="l00953"></a><span class="lineno">  953</span>  SET_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga732609af3be64eef8c4c243ce7f1f46c">PWR_CR2_MONEN</a>);</div>
<div class="line"><a id="l00954" name="l00954"></a><span class="lineno">  954</span>}</div>
<div class="line"><a id="l00955" name="l00955"></a><span class="lineno">  955</span></div>
<div class="line"><a id="l00961" name="l00961"></a><span class="lineno">  961</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableMonitoring(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00962" name="l00962"></a><span class="lineno">  962</span>{</div>
<div class="line"><a id="l00963" name="l00963"></a><span class="lineno">  963</span>  CLEAR_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga732609af3be64eef8c4c243ce7f1f46c">PWR_CR2_MONEN</a>);</div>
<div class="line"><a id="l00964" name="l00964"></a><span class="lineno">  964</span>}</div>
<div class="line"><a id="l00965" name="l00965"></a><span class="lineno">  965</span></div>
<div class="line"><a id="l00971" name="l00971"></a><span class="lineno">  971</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledMonitoring(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l00972" name="l00972"></a><span class="lineno">  972</span>{</div>
<div class="line"><a id="l00973" name="l00973"></a><span class="lineno">  973</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga732609af3be64eef8c4c243ce7f1f46c">PWR_CR2_MONEN</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga732609af3be64eef8c4c243ce7f1f46c">PWR_CR2_MONEN</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l00974" name="l00974"></a><span class="lineno">  974</span>}</div>
<div class="line"><a id="l00975" name="l00975"></a><span class="lineno">  975</span> </div>
<div class="line"><a id="l00976" name="l00976"></a><span class="lineno">  976</span><span class="preprocessor">#if defined (SMPS)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l00996" name="l00996"></a><span class="lineno">  996</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ConfigSupply(uint32_t SupplySource)</div>
<div class="line"><a id="l00997" name="l00997"></a><span class="lineno">  997</span>{</div>
<div class="line"><a id="l00998" name="l00998"></a><span class="lineno">  998</span>  <span class="comment">/* Set the power supply configuration */</span></div>
<div class="line"><a id="l00999" name="l00999"></a><span class="lineno">  999</span>  MODIFY_REG(PWR-&gt;CR3, (PWR_CR3_SMPSLEVEL | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga2e5832efbbab5ab98c031bdb891a7977">PWR_CR3_LDOEN</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga18df5e5c7aaa92d19eb53be04121d143">PWR_CR3_BYPASS</a>), SupplySource);</div>
<div class="line"><a id="l01000" name="l01000"></a><span class="lineno"> 1000</span>}</div>
<div class="line"><a id="l01001" name="l01001"></a><span class="lineno"> 1001</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01012" name="l01012"></a><span class="lineno"> 1012</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ConfigSupply(uint32_t SupplySource)</div>
<div class="line"><a id="l01013" name="l01013"></a><span class="lineno"> 1013</span>{</div>
<div class="line"><a id="l01014" name="l01014"></a><span class="lineno"> 1014</span>  <span class="comment">/* Set the power supply configuration */</span></div>
<div class="line"><a id="l01015" name="l01015"></a><span class="lineno"> 1015</span>  MODIFY_REG(PWR-&gt;CR3, (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaf5a8423dbc59c5572057861d59115222">PWR_CR3_SCUEN</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga2e5832efbbab5ab98c031bdb891a7977">PWR_CR3_LDOEN</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga18df5e5c7aaa92d19eb53be04121d143">PWR_CR3_BYPASS</a>), SupplySource);</div>
<div class="line"><a id="l01016" name="l01016"></a><span class="lineno"> 1016</span>}</div>
<div class="line"><a id="l01017" name="l01017"></a><span class="lineno"> 1017</span><span class="preprocessor">#endif </span><span class="comment">/* defined (SMPS) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01018" name="l01018"></a><span class="lineno"> 1018</span> </div>
<div class="line"><a id="l01019" name="l01019"></a><span class="lineno"> 1019</span><span class="preprocessor">#if defined (SMPS)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01038" name="l01038"></a><span class="lineno"> 1038</span>__STATIC_INLINE uint32_t LL_PWR_GetSupply(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01039" name="l01039"></a><span class="lineno"> 1039</span>{</div>
<div class="line"><a id="l01040" name="l01040"></a><span class="lineno"> 1040</span>  <span class="comment">/* Get the power supply configuration */</span></div>
<div class="line"><a id="l01041" name="l01041"></a><span class="lineno"> 1041</span>  <span class="keywordflow">return</span>(uint32_t)(READ_BIT(PWR-&gt;CR3, (PWR_CR3_SMPSLEVEL | PWR_CR3_SMPSEXTHP | PWR_CR3_SMPSEN | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga2e5832efbbab5ab98c031bdb891a7977">PWR_CR3_LDOEN</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga18df5e5c7aaa92d19eb53be04121d143">PWR_CR3_BYPASS</a>)));</div>
<div class="line"><a id="l01042" name="l01042"></a><span class="lineno"> 1042</span>}</div>
<div class="line"><a id="l01043" name="l01043"></a><span class="lineno"> 1043</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01053" name="l01053"></a><span class="lineno"> 1053</span>__STATIC_INLINE uint32_t LL_PWR_GetSupply(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01054" name="l01054"></a><span class="lineno"> 1054</span>{</div>
<div class="line"><a id="l01055" name="l01055"></a><span class="lineno"> 1055</span>  <span class="comment">/* Get the power supply configuration */</span></div>
<div class="line"><a id="l01056" name="l01056"></a><span class="lineno"> 1056</span>  <span class="keywordflow">return</span>(uint32_t)(READ_BIT(PWR-&gt;CR3, (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaf5a8423dbc59c5572057861d59115222">PWR_CR3_SCUEN</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga2e5832efbbab5ab98c031bdb891a7977">PWR_CR3_LDOEN</a> | <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga18df5e5c7aaa92d19eb53be04121d143">PWR_CR3_BYPASS</a>)));</div>
<div class="line"><a id="l01057" name="l01057"></a><span class="lineno"> 1057</span>}</div>
<div class="line"><a id="l01058" name="l01058"></a><span class="lineno"> 1058</span><span class="preprocessor">#endif </span><span class="comment">/* defined (SMPS) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01059" name="l01059"></a><span class="lineno"> 1059</span></div>
<div class="line"><a id="l01065" name="l01065"></a><span class="lineno"> 1065</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableBatteryCharging(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01066" name="l01066"></a><span class="lineno"> 1066</span>{</div>
<div class="line"><a id="l01067" name="l01067"></a><span class="lineno"> 1067</span>  SET_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaabba4222905284bb54d6f5157883c30b">PWR_CR3_VBE</a>);</div>
<div class="line"><a id="l01068" name="l01068"></a><span class="lineno"> 1068</span>}</div>
<div class="line"><a id="l01069" name="l01069"></a><span class="lineno"> 1069</span></div>
<div class="line"><a id="l01075" name="l01075"></a><span class="lineno"> 1075</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableBatteryCharging(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01076" name="l01076"></a><span class="lineno"> 1076</span>{</div>
<div class="line"><a id="l01077" name="l01077"></a><span class="lineno"> 1077</span>  CLEAR_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaabba4222905284bb54d6f5157883c30b">PWR_CR3_VBE</a>);</div>
<div class="line"><a id="l01078" name="l01078"></a><span class="lineno"> 1078</span>}</div>
<div class="line"><a id="l01079" name="l01079"></a><span class="lineno"> 1079</span></div>
<div class="line"><a id="l01085" name="l01085"></a><span class="lineno"> 1085</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledBatteryCharging(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01086" name="l01086"></a><span class="lineno"> 1086</span>{</div>
<div class="line"><a id="l01087" name="l01087"></a><span class="lineno"> 1087</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaabba4222905284bb54d6f5157883c30b">PWR_CR3_VBE</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaabba4222905284bb54d6f5157883c30b">PWR_CR3_VBE</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01088" name="l01088"></a><span class="lineno"> 1088</span>}</div>
<div class="line"><a id="l01089" name="l01089"></a><span class="lineno"> 1089</span></div>
<div class="line"><a id="l01098" name="l01098"></a><span class="lineno"> 1098</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetBattChargResistor(uint32_t Resistor)</div>
<div class="line"><a id="l01099" name="l01099"></a><span class="lineno"> 1099</span>{</div>
<div class="line"><a id="l01100" name="l01100"></a><span class="lineno"> 1100</span>  MODIFY_REG(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga21807d08cdbb2fbd8f42b731a5d528ce">PWR_CR3_VBRS</a>, Resistor);</div>
<div class="line"><a id="l01101" name="l01101"></a><span class="lineno"> 1101</span>}</div>
<div class="line"><a id="l01102" name="l01102"></a><span class="lineno"> 1102</span></div>
<div class="line"><a id="l01110" name="l01110"></a><span class="lineno"> 1110</span>__STATIC_INLINE uint32_t LL_PWR_GetBattChargResistor(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01111" name="l01111"></a><span class="lineno"> 1111</span>{</div>
<div class="line"><a id="l01112" name="l01112"></a><span class="lineno"> 1112</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga21807d08cdbb2fbd8f42b731a5d528ce">PWR_CR3_VBRS</a>));</div>
<div class="line"><a id="l01113" name="l01113"></a><span class="lineno"> 1113</span>}</div>
<div class="line"><a id="l01114" name="l01114"></a><span class="lineno"> 1114</span></div>
<div class="line"><a id="l01120" name="l01120"></a><span class="lineno"> 1120</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableUSBReg(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01121" name="l01121"></a><span class="lineno"> 1121</span>{</div>
<div class="line"><a id="l01122" name="l01122"></a><span class="lineno"> 1122</span>  SET_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacdb4aff167de72e6d0b786abc6d9e45f">PWR_CR3_USBREGEN</a>);</div>
<div class="line"><a id="l01123" name="l01123"></a><span class="lineno"> 1123</span>}</div>
<div class="line"><a id="l01124" name="l01124"></a><span class="lineno"> 1124</span></div>
<div class="line"><a id="l01130" name="l01130"></a><span class="lineno"> 1130</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableUSBReg(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01131" name="l01131"></a><span class="lineno"> 1131</span>{</div>
<div class="line"><a id="l01132" name="l01132"></a><span class="lineno"> 1132</span>  CLEAR_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacdb4aff167de72e6d0b786abc6d9e45f">PWR_CR3_USBREGEN</a>);</div>
<div class="line"><a id="l01133" name="l01133"></a><span class="lineno"> 1133</span>}</div>
<div class="line"><a id="l01134" name="l01134"></a><span class="lineno"> 1134</span></div>
<div class="line"><a id="l01140" name="l01140"></a><span class="lineno"> 1140</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledUSBReg(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01141" name="l01141"></a><span class="lineno"> 1141</span>{</div>
<div class="line"><a id="l01142" name="l01142"></a><span class="lineno"> 1142</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacdb4aff167de72e6d0b786abc6d9e45f">PWR_CR3_USBREGEN</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacdb4aff167de72e6d0b786abc6d9e45f">PWR_CR3_USBREGEN</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01143" name="l01143"></a><span class="lineno"> 1143</span>}</div>
<div class="line"><a id="l01144" name="l01144"></a><span class="lineno"> 1144</span></div>
<div class="line"><a id="l01150" name="l01150"></a><span class="lineno"> 1150</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableUSBVoltageDetector(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01151" name="l01151"></a><span class="lineno"> 1151</span>{</div>
<div class="line"><a id="l01152" name="l01152"></a><span class="lineno"> 1152</span>  SET_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga40d45cbf0931adfbbca0af29a7740151">PWR_CR3_USB33DEN</a>);</div>
<div class="line"><a id="l01153" name="l01153"></a><span class="lineno"> 1153</span>}</div>
<div class="line"><a id="l01154" name="l01154"></a><span class="lineno"> 1154</span></div>
<div class="line"><a id="l01160" name="l01160"></a><span class="lineno"> 1160</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableUSBVoltageDetector(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01161" name="l01161"></a><span class="lineno"> 1161</span>{</div>
<div class="line"><a id="l01162" name="l01162"></a><span class="lineno"> 1162</span>  CLEAR_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga40d45cbf0931adfbbca0af29a7740151">PWR_CR3_USB33DEN</a>);</div>
<div class="line"><a id="l01163" name="l01163"></a><span class="lineno"> 1163</span>}</div>
<div class="line"><a id="l01164" name="l01164"></a><span class="lineno"> 1164</span></div>
<div class="line"><a id="l01170" name="l01170"></a><span class="lineno"> 1170</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledUSBVoltageDetector(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01171" name="l01171"></a><span class="lineno"> 1171</span>{</div>
<div class="line"><a id="l01172" name="l01172"></a><span class="lineno"> 1172</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga40d45cbf0931adfbbca0af29a7740151">PWR_CR3_USB33DEN</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga40d45cbf0931adfbbca0af29a7740151">PWR_CR3_USB33DEN</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01173" name="l01173"></a><span class="lineno"> 1173</span>}</div>
<div class="line"><a id="l01174" name="l01174"></a><span class="lineno"> 1174</span> </div>
<div class="line"><a id="l01175" name="l01175"></a><span class="lineno"> 1175</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01184" name="l01184"></a><span class="lineno"> 1184</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU_SetD1PowerMode(uint32_t PDMode)</div>
<div class="line"><a id="l01185" name="l01185"></a><span class="lineno"> 1185</span>{</div>
<div class="line"><a id="l01186" name="l01186"></a><span class="lineno"> 1186</span>  MODIFY_REG(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga49eefe139ecdaf7012ae122292f9f2b2">PWR_CPUCR_PDDS_D1</a>, PDMode);</div>
<div class="line"><a id="l01187" name="l01187"></a><span class="lineno"> 1187</span>}</div>
<div class="line"><a id="l01188" name="l01188"></a><span class="lineno"> 1188</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01197" name="l01197"></a><span class="lineno"> 1197</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU_SetCDPowerMode(uint32_t PDMode)</div>
<div class="line"><a id="l01198" name="l01198"></a><span class="lineno"> 1198</span>{</div>
<div class="line"><a id="l01199" name="l01199"></a><span class="lineno"> 1199</span>  MODIFY_REG(PWR-&gt;CPUCR, PWR_CPUCR_RETDS_CD, PDMode);</div>
<div class="line"><a id="l01200" name="l01200"></a><span class="lineno"> 1200</span>}</div>
<div class="line"><a id="l01201" name="l01201"></a><span class="lineno"> 1201</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01202" name="l01202"></a><span class="lineno"> 1202</span> </div>
<div class="line"><a id="l01203" name="l01203"></a><span class="lineno"> 1203</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01212" name="l01212"></a><span class="lineno"> 1212</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU2_SetD1PowerMode(uint32_t PDMode)</div>
<div class="line"><a id="l01213" name="l01213"></a><span class="lineno"> 1213</span>{</div>
<div class="line"><a id="l01214" name="l01214"></a><span class="lineno"> 1214</span>  MODIFY_REG(PWR-&gt;CPU2CR, PWR_CPU2CR_PDDS_D1, PDMode);</div>
<div class="line"><a id="l01215" name="l01215"></a><span class="lineno"> 1215</span>}</div>
<div class="line"><a id="l01216" name="l01216"></a><span class="lineno"> 1216</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01217" name="l01217"></a><span class="lineno"> 1217</span> </div>
<div class="line"><a id="l01218" name="l01218"></a><span class="lineno"> 1218</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01226" name="l01226"></a><span class="lineno"> 1226</span>__STATIC_INLINE uint32_t LL_PWR_CPU_GetD1PowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01227" name="l01227"></a><span class="lineno"> 1227</span>{</div>
<div class="line"><a id="l01228" name="l01228"></a><span class="lineno"> 1228</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga49eefe139ecdaf7012ae122292f9f2b2">PWR_CPUCR_PDDS_D1</a>));</div>
<div class="line"><a id="l01229" name="l01229"></a><span class="lineno"> 1229</span>}</div>
<div class="line"><a id="l01230" name="l01230"></a><span class="lineno"> 1230</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01238" name="l01238"></a><span class="lineno"> 1238</span>__STATIC_INLINE uint32_t LL_PWR_CPU_GetCDPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01239" name="l01239"></a><span class="lineno"> 1239</span>{</div>
<div class="line"><a id="l01240" name="l01240"></a><span class="lineno"> 1240</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CPUCR, PWR_CPUCR_RETDS_CD));</div>
<div class="line"><a id="l01241" name="l01241"></a><span class="lineno"> 1241</span>}</div>
<div class="line"><a id="l01242" name="l01242"></a><span class="lineno"> 1242</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01243" name="l01243"></a><span class="lineno"> 1243</span> </div>
<div class="line"><a id="l01244" name="l01244"></a><span class="lineno"> 1244</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01252" name="l01252"></a><span class="lineno"> 1252</span>__STATIC_INLINE uint32_t LL_PWR_CPU2_GetD1PowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01253" name="l01253"></a><span class="lineno"> 1253</span>{</div>
<div class="line"><a id="l01254" name="l01254"></a><span class="lineno"> 1254</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_PDDS_D1));</div>
<div class="line"><a id="l01255" name="l01255"></a><span class="lineno"> 1255</span>}</div>
<div class="line"><a id="l01256" name="l01256"></a><span class="lineno"> 1256</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01257" name="l01257"></a><span class="lineno"> 1257</span> </div>
<div class="line"><a id="l01258" name="l01258"></a><span class="lineno"> 1258</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01267" name="l01267"></a><span class="lineno"> 1267</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU_SetD2PowerMode(uint32_t PDMode)</div>
<div class="line"><a id="l01268" name="l01268"></a><span class="lineno"> 1268</span>{</div>
<div class="line"><a id="l01269" name="l01269"></a><span class="lineno"> 1269</span>  MODIFY_REG(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga1d847c56f1d197f0f0520b432a90ffb9">PWR_CPUCR_PDDS_D2</a>, PDMode);</div>
<div class="line"><a id="l01270" name="l01270"></a><span class="lineno"> 1270</span>}</div>
<div class="line"><a id="l01271" name="l01271"></a><span class="lineno"> 1271</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01272" name="l01272"></a><span class="lineno"> 1272</span> </div>
<div class="line"><a id="l01273" name="l01273"></a><span class="lineno"> 1273</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01282" name="l01282"></a><span class="lineno"> 1282</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU2_SetD2PowerMode(uint32_t PDMode)</div>
<div class="line"><a id="l01283" name="l01283"></a><span class="lineno"> 1283</span>{</div>
<div class="line"><a id="l01284" name="l01284"></a><span class="lineno"> 1284</span>  MODIFY_REG(PWR-&gt;CPU2CR, PWR_CPU2CR_PDDS_D2, PDMode);</div>
<div class="line"><a id="l01285" name="l01285"></a><span class="lineno"> 1285</span>}</div>
<div class="line"><a id="l01286" name="l01286"></a><span class="lineno"> 1286</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01287" name="l01287"></a><span class="lineno"> 1287</span> </div>
<div class="line"><a id="l01288" name="l01288"></a><span class="lineno"> 1288</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01296" name="l01296"></a><span class="lineno"> 1296</span>__STATIC_INLINE uint32_t LL_PWR_CPU_GetD2PowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01297" name="l01297"></a><span class="lineno"> 1297</span>{</div>
<div class="line"><a id="l01298" name="l01298"></a><span class="lineno"> 1298</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga1d847c56f1d197f0f0520b432a90ffb9">PWR_CPUCR_PDDS_D2</a>));</div>
<div class="line"><a id="l01299" name="l01299"></a><span class="lineno"> 1299</span>}</div>
<div class="line"><a id="l01300" name="l01300"></a><span class="lineno"> 1300</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01301" name="l01301"></a><span class="lineno"> 1301</span> </div>
<div class="line"><a id="l01302" name="l01302"></a><span class="lineno"> 1302</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01310" name="l01310"></a><span class="lineno"> 1310</span>__STATIC_INLINE uint32_t LL_PWR_CPU2_GetD2PowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01311" name="l01311"></a><span class="lineno"> 1311</span>{</div>
<div class="line"><a id="l01312" name="l01312"></a><span class="lineno"> 1312</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_PDDS_D2));</div>
<div class="line"><a id="l01313" name="l01313"></a><span class="lineno"> 1313</span>}</div>
<div class="line"><a id="l01314" name="l01314"></a><span class="lineno"> 1314</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01315" name="l01315"></a><span class="lineno"> 1315</span> </div>
<div class="line"><a id="l01316" name="l01316"></a><span class="lineno"> 1316</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01325" name="l01325"></a><span class="lineno"> 1325</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU_SetD3PowerMode(uint32_t PDMode)</div>
<div class="line"><a id="l01326" name="l01326"></a><span class="lineno"> 1326</span>{</div>
<div class="line"><a id="l01327" name="l01327"></a><span class="lineno"> 1327</span>  MODIFY_REG(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga7939570e266aa5f257e8314f14154bb7">PWR_CPUCR_PDDS_D3</a> , PDMode);</div>
<div class="line"><a id="l01328" name="l01328"></a><span class="lineno"> 1328</span>}</div>
<div class="line"><a id="l01329" name="l01329"></a><span class="lineno"> 1329</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01338" name="l01338"></a><span class="lineno"> 1338</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU_SetSRDPowerMode(uint32_t PDMode)</div>
<div class="line"><a id="l01339" name="l01339"></a><span class="lineno"> 1339</span>{</div>
<div class="line"><a id="l01340" name="l01340"></a><span class="lineno"> 1340</span>  MODIFY_REG(PWR-&gt;CPUCR, PWR_CPUCR_PDDS_SRD , PDMode);</div>
<div class="line"><a id="l01341" name="l01341"></a><span class="lineno"> 1341</span>}</div>
<div class="line"><a id="l01342" name="l01342"></a><span class="lineno"> 1342</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01343" name="l01343"></a><span class="lineno"> 1343</span> </div>
<div class="line"><a id="l01344" name="l01344"></a><span class="lineno"> 1344</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01353" name="l01353"></a><span class="lineno"> 1353</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU2_SetD3PowerMode(uint32_t PDMode)</div>
<div class="line"><a id="l01354" name="l01354"></a><span class="lineno"> 1354</span>{</div>
<div class="line"><a id="l01355" name="l01355"></a><span class="lineno"> 1355</span>  MODIFY_REG(PWR-&gt;CPU2CR, PWR_CPU2CR_PDDS_D3, PDMode);</div>
<div class="line"><a id="l01356" name="l01356"></a><span class="lineno"> 1356</span>}</div>
<div class="line"><a id="l01357" name="l01357"></a><span class="lineno"> 1357</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01358" name="l01358"></a><span class="lineno"> 1358</span> </div>
<div class="line"><a id="l01359" name="l01359"></a><span class="lineno"> 1359</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01367" name="l01367"></a><span class="lineno"> 1367</span>__STATIC_INLINE uint32_t LL_PWR_CPU_GetD3PowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01368" name="l01368"></a><span class="lineno"> 1368</span>{</div>
<div class="line"><a id="l01369" name="l01369"></a><span class="lineno"> 1369</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga7939570e266aa5f257e8314f14154bb7">PWR_CPUCR_PDDS_D3</a>));</div>
<div class="line"><a id="l01370" name="l01370"></a><span class="lineno"> 1370</span>}</div>
<div class="line"><a id="l01371" name="l01371"></a><span class="lineno"> 1371</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01379" name="l01379"></a><span class="lineno"> 1379</span>__STATIC_INLINE uint32_t LL_PWR_CPU_GetSRDPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01380" name="l01380"></a><span class="lineno"> 1380</span>{</div>
<div class="line"><a id="l01381" name="l01381"></a><span class="lineno"> 1381</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CPUCR, PWR_CPUCR_PDDS_SRD));</div>
<div class="line"><a id="l01382" name="l01382"></a><span class="lineno"> 1382</span>}</div>
<div class="line"><a id="l01383" name="l01383"></a><span class="lineno"> 1383</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01384" name="l01384"></a><span class="lineno"> 1384</span> </div>
<div class="line"><a id="l01385" name="l01385"></a><span class="lineno"> 1385</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01393" name="l01393"></a><span class="lineno"> 1393</span>__STATIC_INLINE uint32_t LL_PWR_CPU2_GetD3PowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01394" name="l01394"></a><span class="lineno"> 1394</span>{</div>
<div class="line"><a id="l01395" name="l01395"></a><span class="lineno"> 1395</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_PDDS_D3));</div>
<div class="line"><a id="l01396" name="l01396"></a><span class="lineno"> 1396</span>}</div>
<div class="line"><a id="l01397" name="l01397"></a><span class="lineno"> 1397</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01398" name="l01398"></a><span class="lineno"> 1398</span> </div>
<div class="line"><a id="l01399" name="l01399"></a><span class="lineno"> 1399</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01405" name="l01405"></a><span class="lineno"> 1405</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_HoldCPU1(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01406" name="l01406"></a><span class="lineno"> 1406</span>{</div>
<div class="line"><a id="l01407" name="l01407"></a><span class="lineno"> 1407</span>  SET_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_HOLD1);</div>
<div class="line"><a id="l01408" name="l01408"></a><span class="lineno"> 1408</span>}</div>
<div class="line"><a id="l01409" name="l01409"></a><span class="lineno"> 1409</span></div>
<div class="line"><a id="l01415" name="l01415"></a><span class="lineno"> 1415</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ReleaseCPU1(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01416" name="l01416"></a><span class="lineno"> 1416</span>{</div>
<div class="line"><a id="l01417" name="l01417"></a><span class="lineno"> 1417</span>  CLEAR_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_HOLD1);</div>
<div class="line"><a id="l01418" name="l01418"></a><span class="lineno"> 1418</span>}</div>
<div class="line"><a id="l01419" name="l01419"></a><span class="lineno"> 1419</span></div>
<div class="line"><a id="l01425" name="l01425"></a><span class="lineno"> 1425</span>__STATIC_INLINE uint32_t LL_PWR_IsCPU1Held(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01426" name="l01426"></a><span class="lineno"> 1426</span>{</div>
<div class="line"><a id="l01427" name="l01427"></a><span class="lineno"> 1427</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_HOLD1) == (PWR_CPU2CR_HOLD1))  ? 1UL : 0UL);</div>
<div class="line"><a id="l01428" name="l01428"></a><span class="lineno"> 1428</span>}</div>
<div class="line"><a id="l01429" name="l01429"></a><span class="lineno"> 1429</span></div>
<div class="line"><a id="l01435" name="l01435"></a><span class="lineno"> 1435</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_HoldCPU2(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01436" name="l01436"></a><span class="lineno"> 1436</span>{</div>
<div class="line"><a id="l01437" name="l01437"></a><span class="lineno"> 1437</span>  SET_BIT(PWR-&gt;CPUCR, PWR_CPUCR_HOLD2);</div>
<div class="line"><a id="l01438" name="l01438"></a><span class="lineno"> 1438</span>}</div>
<div class="line"><a id="l01439" name="l01439"></a><span class="lineno"> 1439</span></div>
<div class="line"><a id="l01445" name="l01445"></a><span class="lineno"> 1445</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ReleaseCPU2(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01446" name="l01446"></a><span class="lineno"> 1446</span>{</div>
<div class="line"><a id="l01447" name="l01447"></a><span class="lineno"> 1447</span>  CLEAR_BIT(PWR-&gt;CPUCR, PWR_CPUCR_HOLD2);</div>
<div class="line"><a id="l01448" name="l01448"></a><span class="lineno"> 1448</span>}</div>
<div class="line"><a id="l01449" name="l01449"></a><span class="lineno"> 1449</span></div>
<div class="line"><a id="l01455" name="l01455"></a><span class="lineno"> 1455</span>__STATIC_INLINE uint32_t LL_PWR_IsCPU2Held(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01456" name="l01456"></a><span class="lineno"> 1456</span>{</div>
<div class="line"><a id="l01457" name="l01457"></a><span class="lineno"> 1457</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPUCR, PWR_CPUCR_HOLD2) == (PWR_CPUCR_HOLD2)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01458" name="l01458"></a><span class="lineno"> 1458</span>}</div>
<div class="line"><a id="l01459" name="l01459"></a><span class="lineno"> 1459</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01460" name="l01460"></a><span class="lineno"> 1460</span> </div>
<div class="line"><a id="l01461" name="l01461"></a><span class="lineno"> 1461</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01467" name="l01467"></a><span class="lineno"> 1467</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU_EnableD3RunInLowPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01468" name="l01468"></a><span class="lineno"> 1468</span>{</div>
<div class="line"><a id="l01469" name="l01469"></a><span class="lineno"> 1469</span>  SET_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gabdf5c1446a0dda567000b561094f31c2">PWR_CPUCR_RUN_D3</a>);</div>
<div class="line"><a id="l01470" name="l01470"></a><span class="lineno"> 1470</span>}</div>
<div class="line"><a id="l01471" name="l01471"></a><span class="lineno"> 1471</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01477" name="l01477"></a><span class="lineno"> 1477</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU_EnableSRDRunInLowPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01478" name="l01478"></a><span class="lineno"> 1478</span>{</div>
<div class="line"><a id="l01479" name="l01479"></a><span class="lineno"> 1479</span>  SET_BIT(PWR-&gt;CPUCR, PWR_CPUCR_RUN_SRD);</div>
<div class="line"><a id="l01480" name="l01480"></a><span class="lineno"> 1480</span>}</div>
<div class="line"><a id="l01481" name="l01481"></a><span class="lineno"> 1481</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01482" name="l01482"></a><span class="lineno"> 1482</span> </div>
<div class="line"><a id="l01483" name="l01483"></a><span class="lineno"> 1483</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01489" name="l01489"></a><span class="lineno"> 1489</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU2_EnableD3RunInLowPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01490" name="l01490"></a><span class="lineno"> 1490</span>{</div>
<div class="line"><a id="l01491" name="l01491"></a><span class="lineno"> 1491</span>  SET_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_RUN_D3);</div>
<div class="line"><a id="l01492" name="l01492"></a><span class="lineno"> 1492</span>}</div>
<div class="line"><a id="l01493" name="l01493"></a><span class="lineno"> 1493</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01494" name="l01494"></a><span class="lineno"> 1494</span> </div>
<div class="line"><a id="l01495" name="l01495"></a><span class="lineno"> 1495</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01501" name="l01501"></a><span class="lineno"> 1501</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU_DisableD3RunInLowPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01502" name="l01502"></a><span class="lineno"> 1502</span>{</div>
<div class="line"><a id="l01503" name="l01503"></a><span class="lineno"> 1503</span>  CLEAR_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gabdf5c1446a0dda567000b561094f31c2">PWR_CPUCR_RUN_D3</a>);</div>
<div class="line"><a id="l01504" name="l01504"></a><span class="lineno"> 1504</span>}</div>
<div class="line"><a id="l01505" name="l01505"></a><span class="lineno"> 1505</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01511" name="l01511"></a><span class="lineno"> 1511</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU_DisableSRDRunInLowPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01512" name="l01512"></a><span class="lineno"> 1512</span>{</div>
<div class="line"><a id="l01513" name="l01513"></a><span class="lineno"> 1513</span>  CLEAR_BIT(PWR-&gt;CPUCR, PWR_CPUCR_RUN_SRD);</div>
<div class="line"><a id="l01514" name="l01514"></a><span class="lineno"> 1514</span>}</div>
<div class="line"><a id="l01515" name="l01515"></a><span class="lineno"> 1515</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01516" name="l01516"></a><span class="lineno"> 1516</span> </div>
<div class="line"><a id="l01517" name="l01517"></a><span class="lineno"> 1517</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01523" name="l01523"></a><span class="lineno"> 1523</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_CPU2_DisableD3RunInLowPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01524" name="l01524"></a><span class="lineno"> 1524</span>{</div>
<div class="line"><a id="l01525" name="l01525"></a><span class="lineno"> 1525</span>  CLEAR_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_RUN_D3);</div>
<div class="line"><a id="l01526" name="l01526"></a><span class="lineno"> 1526</span>}</div>
<div class="line"><a id="l01527" name="l01527"></a><span class="lineno"> 1527</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01528" name="l01528"></a><span class="lineno"> 1528</span> </div>
<div class="line"><a id="l01529" name="l01529"></a><span class="lineno"> 1529</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01535" name="l01535"></a><span class="lineno"> 1535</span>__STATIC_INLINE uint32_t LL_PWR_CPU_IsEnabledD3RunInLowPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01536" name="l01536"></a><span class="lineno"> 1536</span>{</div>
<div class="line"><a id="l01537" name="l01537"></a><span class="lineno"> 1537</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gabdf5c1446a0dda567000b561094f31c2">PWR_CPUCR_RUN_D3</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gabdf5c1446a0dda567000b561094f31c2">PWR_CPUCR_RUN_D3</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01538" name="l01538"></a><span class="lineno"> 1538</span>}</div>
<div class="line"><a id="l01539" name="l01539"></a><span class="lineno"> 1539</span><span class="preprocessor">#else</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01545" name="l01545"></a><span class="lineno"> 1545</span>__STATIC_INLINE uint32_t LL_PWR_CPU_IsEnabledSRDRunInLowPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01546" name="l01546"></a><span class="lineno"> 1546</span>{</div>
<div class="line"><a id="l01547" name="l01547"></a><span class="lineno"> 1547</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPUCR, PWR_CPUCR_RUN_SRD) == (PWR_CPUCR_RUN_SRD)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01548" name="l01548"></a><span class="lineno"> 1548</span>}</div>
<div class="line"><a id="l01549" name="l01549"></a><span class="lineno"> 1549</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01550" name="l01550"></a><span class="lineno"> 1550</span> </div>
<div class="line"><a id="l01551" name="l01551"></a><span class="lineno"> 1551</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01557" name="l01557"></a><span class="lineno"> 1557</span>__STATIC_INLINE uint32_t LL_PWR_CPU2_IsEnabledD3RunInLowPowerMode(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01558" name="l01558"></a><span class="lineno"> 1558</span>{</div>
<div class="line"><a id="l01559" name="l01559"></a><span class="lineno"> 1559</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_RUN_D3) == (PWR_CPU2CR_RUN_D3)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01560" name="l01560"></a><span class="lineno"> 1560</span>}</div>
<div class="line"><a id="l01561" name="l01561"></a><span class="lineno"> 1561</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01562" name="l01562"></a><span class="lineno"> 1562</span></div>
<div class="line"><a id="l01575" name="l01575"></a><span class="lineno"> 1575</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetRegulVoltageScaling(uint32_t VoltageScaling)</div>
<div class="line"><a id="l01576" name="l01576"></a><span class="lineno"> 1576</span>{</div>
<div class="line"><a id="l01577" name="l01577"></a><span class="lineno"> 1577</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span></div>
<div class="line"><a id="l01578" name="l01578"></a><span class="lineno"> 1578</span>  MODIFY_REG(PWR-&gt;D3CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga5566cb64c9ef928873024d23f3721050">PWR_D3CR_VOS</a>, VoltageScaling);</div>
<div class="line"><a id="l01579" name="l01579"></a><span class="lineno"> 1579</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l01580" name="l01580"></a><span class="lineno"> 1580</span>  MODIFY_REG(PWR-&gt;SRDCR, PWR_SRDCR_VOS, VoltageScaling);</div>
<div class="line"><a id="l01581" name="l01581"></a><span class="lineno"> 1581</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01582" name="l01582"></a><span class="lineno"> 1582</span>}</div>
<div class="line"><a id="l01583" name="l01583"></a><span class="lineno"> 1583</span></div>
<div class="line"><a id="l01595" name="l01595"></a><span class="lineno"> 1595</span>__STATIC_INLINE uint32_t LL_PWR_GetRegulVoltageScaling(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01596" name="l01596"></a><span class="lineno"> 1596</span>{</div>
<div class="line"><a id="l01597" name="l01597"></a><span class="lineno"> 1597</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span></div>
<div class="line"><a id="l01598" name="l01598"></a><span class="lineno"> 1598</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;D3CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga5566cb64c9ef928873024d23f3721050">PWR_D3CR_VOS</a>));</div>
<div class="line"><a id="l01599" name="l01599"></a><span class="lineno"> 1599</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l01600" name="l01600"></a><span class="lineno"> 1600</span>  <span class="keywordflow">return</span> (uint32_t)(READ_BIT(PWR-&gt;SRDCR, PWR_SRDCR_VOS));</div>
<div class="line"><a id="l01601" name="l01601"></a><span class="lineno"> 1601</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01602" name="l01602"></a><span class="lineno"> 1602</span>}</div>
<div class="line"><a id="l01603" name="l01603"></a><span class="lineno"> 1603</span></div>
<div class="line"><a id="l01624" name="l01624"></a><span class="lineno"> 1624</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_EnableWakeUpPin(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01625" name="l01625"></a><span class="lineno"> 1625</span>{</div>
<div class="line"><a id="l01626" name="l01626"></a><span class="lineno"> 1626</span>  SET_BIT(PWR-&gt;WKUPEPR, WakeUpPin);</div>
<div class="line"><a id="l01627" name="l01627"></a><span class="lineno"> 1627</span>}</div>
<div class="line"><a id="l01628" name="l01628"></a><span class="lineno"> 1628</span></div>
<div class="line"><a id="l01649" name="l01649"></a><span class="lineno"> 1649</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_DisableWakeUpPin(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01650" name="l01650"></a><span class="lineno"> 1650</span>{</div>
<div class="line"><a id="l01651" name="l01651"></a><span class="lineno"> 1651</span>  CLEAR_BIT(PWR-&gt;WKUPEPR, WakeUpPin);</div>
<div class="line"><a id="l01652" name="l01652"></a><span class="lineno"> 1652</span>}</div>
<div class="line"><a id="l01653" name="l01653"></a><span class="lineno"> 1653</span></div>
<div class="line"><a id="l01674" name="l01674"></a><span class="lineno"> 1674</span>__STATIC_INLINE uint32_t LL_PWR_IsEnabledWakeUpPin(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01675" name="l01675"></a><span class="lineno"> 1675</span>{</div>
<div class="line"><a id="l01676" name="l01676"></a><span class="lineno"> 1676</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;WKUPEPR, WakeUpPin) == (WakeUpPin)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01677" name="l01677"></a><span class="lineno"> 1677</span>}</div>
<div class="line"><a id="l01678" name="l01678"></a><span class="lineno"> 1678</span></div>
<div class="line"><a id="l01699" name="l01699"></a><span class="lineno"> 1699</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetWakeUpPinPolarityLow(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01700" name="l01700"></a><span class="lineno"> 1700</span>{</div>
<div class="line"><a id="l01701" name="l01701"></a><span class="lineno"> 1701</span>  SET_BIT(PWR-&gt;WKUPEPR, (WakeUpPin &lt;&lt; PWR_WKUPEPR_WKUPP1_Pos));</div>
<div class="line"><a id="l01702" name="l01702"></a><span class="lineno"> 1702</span>}</div>
<div class="line"><a id="l01703" name="l01703"></a><span class="lineno"> 1703</span></div>
<div class="line"><a id="l01724" name="l01724"></a><span class="lineno"> 1724</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetWakeUpPinPolarityHigh(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01725" name="l01725"></a><span class="lineno"> 1725</span>{</div>
<div class="line"><a id="l01726" name="l01726"></a><span class="lineno"> 1726</span>  CLEAR_BIT(PWR-&gt;WKUPEPR, (WakeUpPin &lt;&lt; PWR_WKUPEPR_WKUPP1_Pos));</div>
<div class="line"><a id="l01727" name="l01727"></a><span class="lineno"> 1727</span>}</div>
<div class="line"><a id="l01728" name="l01728"></a><span class="lineno"> 1728</span></div>
<div class="line"><a id="l01749" name="l01749"></a><span class="lineno"> 1749</span>__STATIC_INLINE uint32_t LL_PWR_IsWakeUpPinPolarityLow(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01750" name="l01750"></a><span class="lineno"> 1750</span>{</div>
<div class="line"><a id="l01751" name="l01751"></a><span class="lineno"> 1751</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;WKUPEPR, (WakeUpPin &lt;&lt; PWR_WKUPEPR_WKUPP1_Pos)) == (WakeUpPin &lt;&lt; PWR_WKUPEPR_WKUPP1_Pos)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01752" name="l01752"></a><span class="lineno"> 1752</span>}</div>
<div class="line"><a id="l01753" name="l01753"></a><span class="lineno"> 1753</span></div>
<div class="line"><a id="l01774" name="l01774"></a><span class="lineno"> 1774</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetWakeUpPinPullNone(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01775" name="l01775"></a><span class="lineno"> 1775</span>{</div>
<div class="line"><a id="l01776" name="l01776"></a><span class="lineno"> 1776</span>  MODIFY_REG(PWR-&gt;WKUPEPR, \</div>
<div class="line"><a id="l01777" name="l01777"></a><span class="lineno"> 1777</span>            (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3d4d277d03905aeac07b79e81c9af0ac">PWR_WKUPEPR_WKUPPUPD1</a> &lt;&lt; ((LL_PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET * POSITION_VAL(WakeUpPin)) &amp; LL_PWR_WAKEUP_PINS_MAX_SHIFT_MASK)), \</div>
<div class="line"><a id="l01778" name="l01778"></a><span class="lineno"> 1778</span>            (LL_PWR_WAKEUP_PIN_NOPULL &lt;&lt; ((PWR_WKUPEPR_WKUPPUPD1_Pos + (LL_PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET * POSITION_VAL(WakeUpPin))) &amp; LL_PWR_WAKEUP_PINS_MAX_SHIFT_MASK)));</div>
<div class="line"><a id="l01779" name="l01779"></a><span class="lineno"> 1779</span>}</div>
<div class="line"><a id="l01780" name="l01780"></a><span class="lineno"> 1780</span></div>
<div class="line"><a id="l01801" name="l01801"></a><span class="lineno"> 1801</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetWakeUpPinPullUp(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01802" name="l01802"></a><span class="lineno"> 1802</span>{</div>
<div class="line"><a id="l01803" name="l01803"></a><span class="lineno"> 1803</span>  MODIFY_REG(PWR-&gt;WKUPEPR, \</div>
<div class="line"><a id="l01804" name="l01804"></a><span class="lineno"> 1804</span>            (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3d4d277d03905aeac07b79e81c9af0ac">PWR_WKUPEPR_WKUPPUPD1</a> &lt;&lt; ((LL_PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET * POSITION_VAL(WakeUpPin)) &amp; LL_PWR_WAKEUP_PINS_MAX_SHIFT_MASK)), \</div>
<div class="line"><a id="l01805" name="l01805"></a><span class="lineno"> 1805</span>            (LL_PWR_WAKEUP_PIN_PULLUP &lt;&lt; ((PWR_WKUPEPR_WKUPPUPD1_Pos + (LL_PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET * POSITION_VAL(WakeUpPin))) &amp; LL_PWR_WAKEUP_PINS_MAX_SHIFT_MASK)));</div>
<div class="line"><a id="l01806" name="l01806"></a><span class="lineno"> 1806</span>}</div>
<div class="line"><a id="l01807" name="l01807"></a><span class="lineno"> 1807</span></div>
<div class="line"><a id="l01828" name="l01828"></a><span class="lineno"> 1828</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_SetWakeUpPinPullDown(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01829" name="l01829"></a><span class="lineno"> 1829</span>{</div>
<div class="line"><a id="l01830" name="l01830"></a><span class="lineno"> 1830</span>  MODIFY_REG(PWR-&gt;WKUPEPR, \</div>
<div class="line"><a id="l01831" name="l01831"></a><span class="lineno"> 1831</span>            (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3d4d277d03905aeac07b79e81c9af0ac">PWR_WKUPEPR_WKUPPUPD1</a> &lt;&lt; ((LL_PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET * POSITION_VAL(WakeUpPin)) &amp; LL_PWR_WAKEUP_PINS_MAX_SHIFT_MASK)), \</div>
<div class="line"><a id="l01832" name="l01832"></a><span class="lineno"> 1832</span>            (LL_PWR_WAKEUP_PIN_PULLDOWN &lt;&lt; ((PWR_WKUPEPR_WKUPPUPD1_Pos + (LL_PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET * POSITION_VAL(WakeUpPin))) &amp; LL_PWR_WAKEUP_PINS_MAX_SHIFT_MASK)));</div>
<div class="line"><a id="l01833" name="l01833"></a><span class="lineno"> 1833</span>}</div>
<div class="line"><a id="l01834" name="l01834"></a><span class="lineno"> 1834</span></div>
<div class="line"><a id="l01858" name="l01858"></a><span class="lineno"> 1858</span>__STATIC_INLINE uint32_t LL_PWR_GetWakeUpPinPull(uint32_t WakeUpPin)</div>
<div class="line"><a id="l01859" name="l01859"></a><span class="lineno"> 1859</span>{</div>
<div class="line"><a id="l01860" name="l01860"></a><span class="lineno"> 1860</span>  uint32_t regValue = READ_BIT(PWR-&gt;WKUPEPR, (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3d4d277d03905aeac07b79e81c9af0ac">PWR_WKUPEPR_WKUPPUPD1</a> &lt;&lt; ((LL_PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET * POSITION_VAL(WakeUpPin)) &amp; LL_PWR_WAKEUP_PINS_MAX_SHIFT_MASK)));</div>
<div class="line"><a id="l01861" name="l01861"></a><span class="lineno"> 1861</span> </div>
<div class="line"><a id="l01862" name="l01862"></a><span class="lineno"> 1862</span>  <span class="keywordflow">return</span> (uint32_t)(regValue &gt;&gt; ((PWR_WKUPEPR_WKUPPUPD1_Pos + (LL_PWR_WAKEUP_PINS_PULL_SHIFT_OFFSET * POSITION_VAL(WakeUpPin))) &amp; LL_PWR_WAKEUP_PINS_MAX_SHIFT_MASK));</div>
<div class="line"><a id="l01863" name="l01863"></a><span class="lineno"> 1863</span>}</div>
<div class="line"><a id="l01864" name="l01864"></a><span class="lineno"> 1864</span></div>
<div class="line"><a id="l01868" name="l01868"></a><span class="lineno"> 1868</span></div>
<div class="line"><a id="l01872" name="l01872"></a><span class="lineno"> 1872</span></div>
<div class="line"><a id="l01878" name="l01878"></a><span class="lineno"> 1878</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_PVDO(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01879" name="l01879"></a><span class="lineno"> 1879</span>{</div>
<div class="line"><a id="l01880" name="l01880"></a><span class="lineno"> 1880</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CSR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaf3e9a5812547f32576265e00802de3d0">PWR_CSR1_PVDO</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaf3e9a5812547f32576265e00802de3d0">PWR_CSR1_PVDO</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01881" name="l01881"></a><span class="lineno"> 1881</span>}</div>
<div class="line"><a id="l01882" name="l01882"></a><span class="lineno"> 1882</span></div>
<div class="line"><a id="l01888" name="l01888"></a><span class="lineno"> 1888</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_ACTVOS(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01889" name="l01889"></a><span class="lineno"> 1889</span>{</div>
<div class="line"><a id="l01890" name="l01890"></a><span class="lineno"> 1890</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CSR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga6c8845e351ae1b92d1e6ec45395102f3">PWR_CSR1_ACTVOSRDY</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga6c8845e351ae1b92d1e6ec45395102f3">PWR_CSR1_ACTVOSRDY</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01891" name="l01891"></a><span class="lineno"> 1891</span>}</div>
<div class="line"><a id="l01892" name="l01892"></a><span class="lineno"> 1892</span></div>
<div class="line"><a id="l01898" name="l01898"></a><span class="lineno"> 1898</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_AVDO(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01899" name="l01899"></a><span class="lineno"> 1899</span>{</div>
<div class="line"><a id="l01900" name="l01900"></a><span class="lineno"> 1900</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CSR1, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga0839931d400544985c1955ed9eeb55e9">PWR_CSR1_AVDO</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga0839931d400544985c1955ed9eeb55e9">PWR_CSR1_AVDO</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01901" name="l01901"></a><span class="lineno"> 1901</span>}</div>
<div class="line"><a id="l01902" name="l01902"></a><span class="lineno"> 1902</span> </div>
<div class="line"><a id="l01903" name="l01903"></a><span class="lineno"> 1903</span><span class="preprocessor">#if defined (PWR_CSR1_MMCVDO)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01909" name="l01909"></a><span class="lineno"> 1909</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_MMCVDO(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01910" name="l01910"></a><span class="lineno"> 1910</span>{</div>
<div class="line"><a id="l01911" name="l01911"></a><span class="lineno"> 1911</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CSR1, PWR_CSR1_MMCVDO) == (PWR_CSR1_MMCVDO)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01912" name="l01912"></a><span class="lineno"> 1912</span>}</div>
<div class="line"><a id="l01913" name="l01913"></a><span class="lineno"> 1913</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CSR1_MMCVDO */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01914" name="l01914"></a><span class="lineno"> 1914</span></div>
<div class="line"><a id="l01920" name="l01920"></a><span class="lineno"> 1920</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_BRR(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01921" name="l01921"></a><span class="lineno"> 1921</span>{</div>
<div class="line"><a id="l01922" name="l01922"></a><span class="lineno"> 1922</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae3552758eb3c4985410fe8911560f298">PWR_CR2_BRRDY</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae3552758eb3c4985410fe8911560f298">PWR_CR2_BRRDY</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01923" name="l01923"></a><span class="lineno"> 1923</span>}</div>
<div class="line"><a id="l01924" name="l01924"></a><span class="lineno"> 1924</span></div>
<div class="line"><a id="l01930" name="l01930"></a><span class="lineno"> 1930</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VBATL(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01931" name="l01931"></a><span class="lineno"> 1931</span>{</div>
<div class="line"><a id="l01932" name="l01932"></a><span class="lineno"> 1932</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga36dd5dc04502cb2bcfbbbad9247d47da">PWR_CR2_VBATL</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga36dd5dc04502cb2bcfbbbad9247d47da">PWR_CR2_VBATL</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01933" name="l01933"></a><span class="lineno"> 1933</span>}</div>
<div class="line"><a id="l01934" name="l01934"></a><span class="lineno"> 1934</span></div>
<div class="line"><a id="l01940" name="l01940"></a><span class="lineno"> 1940</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VBATH(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01941" name="l01941"></a><span class="lineno"> 1941</span>{</div>
<div class="line"><a id="l01942" name="l01942"></a><span class="lineno"> 1942</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaac411ccef055ec95447cd8b736221e06">PWR_CR2_VBATH</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gaac411ccef055ec95447cd8b736221e06">PWR_CR2_VBATH</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01943" name="l01943"></a><span class="lineno"> 1943</span>}</div>
<div class="line"><a id="l01944" name="l01944"></a><span class="lineno"> 1944</span></div>
<div class="line"><a id="l01950" name="l01950"></a><span class="lineno"> 1950</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_TEMPL(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01951" name="l01951"></a><span class="lineno"> 1951</span>{</div>
<div class="line"><a id="l01952" name="l01952"></a><span class="lineno"> 1952</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga186c016996c65b07e913e83155082865">PWR_CR2_TEMPL</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga186c016996c65b07e913e83155082865">PWR_CR2_TEMPL</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01953" name="l01953"></a><span class="lineno"> 1953</span>}</div>
<div class="line"><a id="l01954" name="l01954"></a><span class="lineno"> 1954</span></div>
<div class="line"><a id="l01960" name="l01960"></a><span class="lineno"> 1960</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_TEMPH(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01961" name="l01961"></a><span class="lineno"> 1961</span>{</div>
<div class="line"><a id="l01962" name="l01962"></a><span class="lineno"> 1962</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR2, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gab519388ffad6698f98ada73c4bf81248">PWR_CR2_TEMPH</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gab519388ffad6698f98ada73c4bf81248">PWR_CR2_TEMPH</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01963" name="l01963"></a><span class="lineno"> 1963</span>}</div>
<div class="line"><a id="l01964" name="l01964"></a><span class="lineno"> 1964</span> </div>
<div class="line"><a id="l01965" name="l01965"></a><span class="lineno"> 1965</span><span class="preprocessor">#if defined (SMPS)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01971" name="l01971"></a><span class="lineno"> 1971</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_SMPSEXT(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01972" name="l01972"></a><span class="lineno"> 1972</span>{</div>
<div class="line"><a id="l01973" name="l01973"></a><span class="lineno"> 1973</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR3, PWR_CR3_SMPSEXTRDY) == (PWR_CR3_SMPSEXTRDY)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01974" name="l01974"></a><span class="lineno"> 1974</span>}</div>
<div class="line"><a id="l01975" name="l01975"></a><span class="lineno"> 1975</span><span class="preprocessor">#endif </span><span class="comment">/* SMPS */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01976" name="l01976"></a><span class="lineno"> 1976</span></div>
<div class="line"><a id="l01982" name="l01982"></a><span class="lineno"> 1982</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_USB(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01983" name="l01983"></a><span class="lineno"> 1983</span>{</div>
<div class="line"><a id="l01984" name="l01984"></a><span class="lineno"> 1984</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CR3, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga64e25571a035b217eee2f8d99f5ca20d">PWR_CR3_USB33RDY</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga64e25571a035b217eee2f8d99f5ca20d">PWR_CR3_USB33RDY</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01985" name="l01985"></a><span class="lineno"> 1985</span>}</div>
<div class="line"><a id="l01986" name="l01986"></a><span class="lineno"> 1986</span> </div>
<div class="line"><a id="l01987" name="l01987"></a><span class="lineno"> 1987</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l01993" name="l01993"></a><span class="lineno"> 1993</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_HOLD2(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l01994" name="l01994"></a><span class="lineno"> 1994</span>{</div>
<div class="line"><a id="l01995" name="l01995"></a><span class="lineno"> 1995</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPUCR, PWR_CPUCR_HOLD2F) == (PWR_CPUCR_HOLD2F)) ? 1UL : 0UL);</div>
<div class="line"><a id="l01996" name="l01996"></a><span class="lineno"> 1996</span>}</div>
<div class="line"><a id="l01997" name="l01997"></a><span class="lineno"> 1997</span></div>
<div class="line"><a id="l02003" name="l02003"></a><span class="lineno"> 2003</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_HOLD1(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02004" name="l02004"></a><span class="lineno"> 2004</span>{</div>
<div class="line"><a id="l02005" name="l02005"></a><span class="lineno"> 2005</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_HOLD1F) == (PWR_CPU2CR_HOLD1F)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02006" name="l02006"></a><span class="lineno"> 2006</span>}</div>
<div class="line"><a id="l02007" name="l02007"></a><span class="lineno"> 2007</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02008" name="l02008"></a><span class="lineno"> 2008</span></div>
<div class="line"><a id="l02014" name="l02014"></a><span class="lineno"> 2014</span>__STATIC_INLINE uint32_t LL_PWR_CPU_IsActiveFlag_STOP(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02015" name="l02015"></a><span class="lineno"> 2015</span>{</div>
<div class="line"><a id="l02016" name="l02016"></a><span class="lineno"> 2016</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3e53d09fb0c22170ff5b37f7587762ec">PWR_CPUCR_STOPF</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga3e53d09fb0c22170ff5b37f7587762ec">PWR_CPUCR_STOPF</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02017" name="l02017"></a><span class="lineno"> 2017</span>}</div>
<div class="line"><a id="l02018" name="l02018"></a><span class="lineno"> 2018</span> </div>
<div class="line"><a id="l02019" name="l02019"></a><span class="lineno"> 2019</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02025" name="l02025"></a><span class="lineno"> 2025</span>__STATIC_INLINE uint32_t LL_PWR_CPU2_IsActiveFlag_STOP(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02026" name="l02026"></a><span class="lineno"> 2026</span>{</div>
<div class="line"><a id="l02027" name="l02027"></a><span class="lineno"> 2027</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_STOPF) == (PWR_CPU2CR_STOPF)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02028" name="l02028"></a><span class="lineno"> 2028</span>}</div>
<div class="line"><a id="l02029" name="l02029"></a><span class="lineno"> 2029</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02030" name="l02030"></a><span class="lineno"> 2030</span></div>
<div class="line"><a id="l02036" name="l02036"></a><span class="lineno"> 2036</span>__STATIC_INLINE uint32_t LL_PWR_CPU_IsActiveFlag_SB(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02037" name="l02037"></a><span class="lineno"> 2037</span>{</div>
<div class="line"><a id="l02038" name="l02038"></a><span class="lineno"> 2038</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga4d4e251da597e8edc8374d3c7bf48c28">PWR_CPUCR_SBF</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga4d4e251da597e8edc8374d3c7bf48c28">PWR_CPUCR_SBF</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02039" name="l02039"></a><span class="lineno"> 2039</span>}</div>
<div class="line"><a id="l02040" name="l02040"></a><span class="lineno"> 2040</span> </div>
<div class="line"><a id="l02041" name="l02041"></a><span class="lineno"> 2041</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02047" name="l02047"></a><span class="lineno"> 2047</span>__STATIC_INLINE uint32_t LL_PWR_CPU2_IsActiveFlag_SB(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02048" name="l02048"></a><span class="lineno"> 2048</span>{</div>
<div class="line"><a id="l02049" name="l02049"></a><span class="lineno"> 2049</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_SBF) == (PWR_CPU2CR_SBF)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02050" name="l02050"></a><span class="lineno"> 2050</span>}</div>
<div class="line"><a id="l02051" name="l02051"></a><span class="lineno"> 2051</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02052" name="l02052"></a><span class="lineno"> 2052</span> </div>
<div class="line"><a id="l02053" name="l02053"></a><span class="lineno"> 2053</span><span class="preprocessor">#if defined (PWR_CPUCR_SBF_D1)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02059" name="l02059"></a><span class="lineno"> 2059</span>__STATIC_INLINE uint32_t LL_PWR_CPU_IsActiveFlag_SB_D1(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02060" name="l02060"></a><span class="lineno"> 2060</span>{</div>
<div class="line"><a id="l02061" name="l02061"></a><span class="lineno"> 2061</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga1143e41195931bccc6b9cebd7defadf8">PWR_CPUCR_SBF_D1</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga1143e41195931bccc6b9cebd7defadf8">PWR_CPUCR_SBF_D1</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02062" name="l02062"></a><span class="lineno"> 2062</span>}</div>
<div class="line"><a id="l02063" name="l02063"></a><span class="lineno"> 2063</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_SBF_D1 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02064" name="l02064"></a><span class="lineno"> 2064</span> </div>
<div class="line"><a id="l02065" name="l02065"></a><span class="lineno"> 2065</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02071" name="l02071"></a><span class="lineno"> 2071</span>__STATIC_INLINE uint32_t LL_PWR_CPU2_IsActiveFlag_SB_D1(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02072" name="l02072"></a><span class="lineno"> 2072</span>{</div>
<div class="line"><a id="l02073" name="l02073"></a><span class="lineno"> 2073</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_SBF_D1) == (PWR_CPU2CR_SBF_D1)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02074" name="l02074"></a><span class="lineno"> 2074</span>}</div>
<div class="line"><a id="l02075" name="l02075"></a><span class="lineno"> 2075</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02076" name="l02076"></a><span class="lineno"> 2076</span> </div>
<div class="line"><a id="l02077" name="l02077"></a><span class="lineno"> 2077</span><span class="preprocessor">#if defined (PWR_CPUCR_SBF_D2)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02083" name="l02083"></a><span class="lineno"> 2083</span>__STATIC_INLINE uint32_t LL_PWR_CPU_IsActiveFlag_SB_D2(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02084" name="l02084"></a><span class="lineno"> 2084</span>{</div>
<div class="line"><a id="l02085" name="l02085"></a><span class="lineno"> 2085</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacc791cb5b4c8721626121b0588576db3">PWR_CPUCR_SBF_D2</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacc791cb5b4c8721626121b0588576db3">PWR_CPUCR_SBF_D2</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02086" name="l02086"></a><span class="lineno"> 2086</span>}</div>
<div class="line"><a id="l02087" name="l02087"></a><span class="lineno"> 2087</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_SBF_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02088" name="l02088"></a><span class="lineno"> 2088</span> </div>
<div class="line"><a id="l02089" name="l02089"></a><span class="lineno"> 2089</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02095" name="l02095"></a><span class="lineno"> 2095</span>__STATIC_INLINE uint32_t LL_PWR_CPU2_IsActiveFlag_SB_D2(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02096" name="l02096"></a><span class="lineno"> 2096</span>{</div>
<div class="line"><a id="l02097" name="l02097"></a><span class="lineno"> 2097</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_SBF_D2) == (PWR_CPU2CR_SBF_D2)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02098" name="l02098"></a><span class="lineno"> 2098</span>}</div>
<div class="line"><a id="l02099" name="l02099"></a><span class="lineno"> 2099</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02100" name="l02100"></a><span class="lineno"> 2100</span> </div>
<div class="line"><a id="l02101" name="l02101"></a><span class="lineno"> 2101</span></div>
<div class="line"><a id="l02108" name="l02108"></a><span class="lineno"> 2108</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_VOS(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02109" name="l02109"></a><span class="lineno"> 2109</span>{</div>
<div class="line"><a id="l02110" name="l02110"></a><span class="lineno"> 2110</span><span class="preprocessor">#if defined (PWR_CPUCR_PDDS_D2)</span></div>
<div class="line"><a id="l02111" name="l02111"></a><span class="lineno"> 2111</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;D3CR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga474482bd93a0c1b2924cdb5d528c5948">PWR_D3CR_VOSRDY</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga474482bd93a0c1b2924cdb5d528c5948">PWR_D3CR_VOSRDY</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02112" name="l02112"></a><span class="lineno"> 2112</span><span class="preprocessor">#else</span></div>
<div class="line"><a id="l02113" name="l02113"></a><span class="lineno"> 2113</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;SRDCR, PWR_SRDCR_VOSRDY) == (PWR_SRDCR_VOSRDY)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02114" name="l02114"></a><span class="lineno"> 2114</span><span class="preprocessor">#endif </span><span class="comment">/* PWR_CPUCR_PDDS_D2 */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02115" name="l02115"></a><span class="lineno"> 2115</span>}</div>
<div class="line"><a id="l02116" name="l02116"></a><span class="lineno"> 2116</span></div>
<div class="line"><a id="l02122" name="l02122"></a><span class="lineno"> 2122</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU6(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02123" name="l02123"></a><span class="lineno"> 2123</span>{</div>
<div class="line"><a id="l02124" name="l02124"></a><span class="lineno"> 2124</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;WKUPFR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gafff4a9218c5dd8a61f6edc1633ea91d1">PWR_WKUPFR_WKUPF6</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gafff4a9218c5dd8a61f6edc1633ea91d1">PWR_WKUPFR_WKUPF6</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02125" name="l02125"></a><span class="lineno"> 2125</span>}</div>
<div class="line"><a id="l02126" name="l02126"></a><span class="lineno"> 2126</span> </div>
<div class="line"><a id="l02127" name="l02127"></a><span class="lineno"> 2127</span><span class="preprocessor">#if defined (PWR_WKUPFR_WKUPF5)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02133" name="l02133"></a><span class="lineno"> 2133</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU5(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02134" name="l02134"></a><span class="lineno"> 2134</span>{</div>
<div class="line"><a id="l02135" name="l02135"></a><span class="lineno"> 2135</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;WKUPFR, PWR_WKUPFR_WKUPF5) == (PWR_WKUPFR_WKUPF5)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02136" name="l02136"></a><span class="lineno"> 2136</span>}</div>
<div class="line"><a id="l02137" name="l02137"></a><span class="lineno"> 2137</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPFR_WKUPF5) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02138" name="l02138"></a><span class="lineno"> 2138</span></div>
<div class="line"><a id="l02144" name="l02144"></a><span class="lineno"> 2144</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU4(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02145" name="l02145"></a><span class="lineno"> 2145</span>{</div>
<div class="line"><a id="l02146" name="l02146"></a><span class="lineno"> 2146</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;WKUPFR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga0c527dcba2e6b9184b62691c6c7984c4">PWR_WKUPFR_WKUPF4</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga0c527dcba2e6b9184b62691c6c7984c4">PWR_WKUPFR_WKUPF4</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02147" name="l02147"></a><span class="lineno"> 2147</span>}</div>
<div class="line"><a id="l02148" name="l02148"></a><span class="lineno"> 2148</span> </div>
<div class="line"><a id="l02149" name="l02149"></a><span class="lineno"> 2149</span><span class="preprocessor">#if defined (PWR_WKUPFR_WKUPF3)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02155" name="l02155"></a><span class="lineno"> 2155</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU3(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02156" name="l02156"></a><span class="lineno"> 2156</span>{</div>
<div class="line"><a id="l02157" name="l02157"></a><span class="lineno"> 2157</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;WKUPFR, PWR_WKUPFR_WKUPF3) == (PWR_WKUPFR_WKUPF3)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02158" name="l02158"></a><span class="lineno"> 2158</span>}</div>
<div class="line"><a id="l02159" name="l02159"></a><span class="lineno"> 2159</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPFR_WKUPF3) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02160" name="l02160"></a><span class="lineno"> 2160</span></div>
<div class="line"><a id="l02166" name="l02166"></a><span class="lineno"> 2166</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU2(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02167" name="l02167"></a><span class="lineno"> 2167</span>{</div>
<div class="line"><a id="l02168" name="l02168"></a><span class="lineno"> 2168</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;WKUPFR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga703c5e67341ec2a5dbe3d01c32e70d49">PWR_WKUPFR_WKUPF2</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga703c5e67341ec2a5dbe3d01c32e70d49">PWR_WKUPFR_WKUPF2</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02169" name="l02169"></a><span class="lineno"> 2169</span>}</div>
<div class="line"><a id="l02170" name="l02170"></a><span class="lineno"> 2170</span></div>
<div class="line"><a id="l02176" name="l02176"></a><span class="lineno"> 2176</span>__STATIC_INLINE uint32_t LL_PWR_IsActiveFlag_WU1(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02177" name="l02177"></a><span class="lineno"> 2177</span>{</div>
<div class="line"><a id="l02178" name="l02178"></a><span class="lineno"> 2178</span>  <span class="keywordflow">return</span> ((READ_BIT(PWR-&gt;WKUPFR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacd3e1821b5493f98f758bef31203d9d4">PWR_WKUPFR_WKUPF1</a>) == (<a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacd3e1821b5493f98f758bef31203d9d4">PWR_WKUPFR_WKUPF1</a>)) ? 1UL : 0UL);</div>
<div class="line"><a id="l02179" name="l02179"></a><span class="lineno"> 2179</span>}</div>
<div class="line"><a id="l02180" name="l02180"></a><span class="lineno"> 2180</span></div>
<div class="line"><a id="l02186" name="l02186"></a><span class="lineno"> 2186</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ClearFlag_CPU(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02187" name="l02187"></a><span class="lineno"> 2187</span>{</div>
<div class="line"><a id="l02188" name="l02188"></a><span class="lineno"> 2188</span>  SET_BIT(PWR-&gt;CPUCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga852ddeb6ccda1c58d5674b856b122b17">PWR_CPUCR_CSSF</a>);</div>
<div class="line"><a id="l02189" name="l02189"></a><span class="lineno"> 2189</span>}</div>
<div class="line"><a id="l02190" name="l02190"></a><span class="lineno"> 2190</span> </div>
<div class="line"><a id="l02191" name="l02191"></a><span class="lineno"> 2191</span><span class="preprocessor">#if defined (DUAL_CORE)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02197" name="l02197"></a><span class="lineno"> 2197</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ClearFlag_CPU2(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02198" name="l02198"></a><span class="lineno"> 2198</span>{</div>
<div class="line"><a id="l02199" name="l02199"></a><span class="lineno"> 2199</span>  SET_BIT(PWR-&gt;CPU2CR, PWR_CPU2CR_CSSF);</div>
<div class="line"><a id="l02200" name="l02200"></a><span class="lineno"> 2200</span>}</div>
<div class="line"><a id="l02201" name="l02201"></a><span class="lineno"> 2201</span><span class="preprocessor">#endif </span><span class="comment">/* DUAL_CORE */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02202" name="l02202"></a><span class="lineno"> 2202</span></div>
<div class="line"><a id="l02208" name="l02208"></a><span class="lineno"> 2208</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ClearFlag_WU6(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02209" name="l02209"></a><span class="lineno"> 2209</span>{</div>
<div class="line"><a id="l02210" name="l02210"></a><span class="lineno"> 2210</span>  WRITE_REG(PWR-&gt;WKUPCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gae2163c159213a47b5aa6c498c8257e0c">PWR_WKUPCR_WKUPC6</a>);</div>
<div class="line"><a id="l02211" name="l02211"></a><span class="lineno"> 2211</span>}</div>
<div class="line"><a id="l02212" name="l02212"></a><span class="lineno"> 2212</span> </div>
<div class="line"><a id="l02213" name="l02213"></a><span class="lineno"> 2213</span><span class="preprocessor">#if defined (PWR_WKUPCR_WKUPC5)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02219" name="l02219"></a><span class="lineno"> 2219</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ClearFlag_WU5(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02220" name="l02220"></a><span class="lineno"> 2220</span>{</div>
<div class="line"><a id="l02221" name="l02221"></a><span class="lineno"> 2221</span>  WRITE_REG(PWR-&gt;WKUPCR, PWR_WKUPCR_WKUPC5);</div>
<div class="line"><a id="l02222" name="l02222"></a><span class="lineno"> 2222</span>}</div>
<div class="line"><a id="l02223" name="l02223"></a><span class="lineno"> 2223</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPCR_WKUPC5) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02224" name="l02224"></a><span class="lineno"> 2224</span></div>
<div class="line"><a id="l02230" name="l02230"></a><span class="lineno"> 2230</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ClearFlag_WU4(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02231" name="l02231"></a><span class="lineno"> 2231</span>{</div>
<div class="line"><a id="l02232" name="l02232"></a><span class="lineno"> 2232</span>  WRITE_REG(PWR-&gt;WKUPCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#ga223b7bd00095a8b2e4fdaa8acb7e35d8">PWR_WKUPCR_WKUPC4</a>);</div>
<div class="line"><a id="l02233" name="l02233"></a><span class="lineno"> 2233</span>}</div>
<div class="line"><a id="l02234" name="l02234"></a><span class="lineno"> 2234</span> </div>
<div class="line"><a id="l02235" name="l02235"></a><span class="lineno"> 2235</span><span class="preprocessor">#if defined (PWR_WKUPCR_WKUPC3)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02241" name="l02241"></a><span class="lineno"> 2241</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ClearFlag_WU3(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02242" name="l02242"></a><span class="lineno"> 2242</span>{</div>
<div class="line"><a id="l02243" name="l02243"></a><span class="lineno"> 2243</span>  WRITE_REG(PWR-&gt;WKUPCR, PWR_WKUPCR_WKUPC3);</div>
<div class="line"><a id="l02244" name="l02244"></a><span class="lineno"> 2244</span>}</div>
<div class="line"><a id="l02245" name="l02245"></a><span class="lineno"> 2245</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR_WKUPCR_WKUPC3) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02246" name="l02246"></a><span class="lineno"> 2246</span></div>
<div class="line"><a id="l02252" name="l02252"></a><span class="lineno"> 2252</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ClearFlag_WU2(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02253" name="l02253"></a><span class="lineno"> 2253</span>{</div>
<div class="line"><a id="l02254" name="l02254"></a><span class="lineno"> 2254</span>  WRITE_REG(PWR-&gt;WKUPCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gacff74d63fa86695d3eed64c759eb5bed">PWR_WKUPCR_WKUPC2</a>);</div>
<div class="line"><a id="l02255" name="l02255"></a><span class="lineno"> 2255</span>}</div>
<div class="line"><a id="l02256" name="l02256"></a><span class="lineno"> 2256</span></div>
<div class="line"><a id="l02262" name="l02262"></a><span class="lineno"> 2262</span>__STATIC_INLINE <span class="keywordtype">void</span> LL_PWR_ClearFlag_WU1(<span class="keywordtype">void</span>)</div>
<div class="line"><a id="l02263" name="l02263"></a><span class="lineno"> 2263</span>{</div>
<div class="line"><a id="l02264" name="l02264"></a><span class="lineno"> 2264</span>  WRITE_REG(PWR-&gt;WKUPCR, <a class="code hl_define" href="group___peripheral___registers___bits___definition.html#gab3f7106e80257d68575ec69d4ba3df1b">PWR_WKUPCR_WKUPC1</a>);</div>
<div class="line"><a id="l02265" name="l02265"></a><span class="lineno"> 2265</span>}</div>
<div class="line"><a id="l02266" name="l02266"></a><span class="lineno"> 2266</span> </div>
<div class="line"><a id="l02267" name="l02267"></a><span class="lineno"> 2267</span><span class="preprocessor">#if defined (USE_FULL_LL_DRIVER)</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02271" name="l02271"></a><span class="lineno"> 2271</span>ErrorStatus LL_PWR_DeInit(<span class="keywordtype">void</span>);</div>
<div class="line"><a id="l02275" name="l02275"></a><span class="lineno"> 2275</span><span class="preprocessor">#endif </span><span class="comment">/* defined (USE_FULL_LL_DRIVER) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02276" name="l02276"></a><span class="lineno"> 2276</span> </div>
<div class="line"><a id="l02277" name="l02277"></a><span class="lineno"> 2277</span></div>
<div class="line"><a id="l02281" name="l02281"></a><span class="lineno"> 2281</span></div>
<div class="line"><a id="l02285" name="l02285"></a><span class="lineno"> 2285</span></div>
<div class="line"><a id="l02289" name="l02289"></a><span class="lineno"> 2289</span> </div>
<div class="line"><a id="l02290" name="l02290"></a><span class="lineno"> 2290</span><span class="preprocessor">#endif </span><span class="comment">/* defined (PWR) */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02291" name="l02291"></a><span class="lineno"> 2291</span></div>
<div class="line"><a id="l02295" name="l02295"></a><span class="lineno"> 2295</span> </div>
<div class="line"><a id="l02296" name="l02296"></a><span class="lineno"> 2296</span><span class="preprocessor">#ifdef __cplusplus</span></div>
<div class="line"><a id="l02297" name="l02297"></a><span class="lineno"> 2297</span>}</div>
<div class="line"><a id="l02298" name="l02298"></a><span class="lineno"> 2298</span><span class="preprocessor">#endif</span></div>
<div class="line"><a id="l02299" name="l02299"></a><span class="lineno"> 2299</span> </div>
<div class="line"><a id="l02300" name="l02300"></a><span class="lineno"> 2300</span><span class="preprocessor">#endif </span><span class="comment">/* STM32H7xx_LL_PWR_H */</span><span class="preprocessor"></span></div>
<div class="line"><a id="l02301" name="l02301"></a><span class="lineno"> 2301</span> </div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga0839931d400544985c1955ed9eeb55e9"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga0839931d400544985c1955ed9eeb55e9">PWR_CSR1_AVDO</a></div><div class="ttdeci">#define PWR_CSR1_AVDO</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14261</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga09950f76d292eb9d01f72dd825082f1b"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga09950f76d292eb9d01f72dd825082f1b">PWR_CR1_DBP</a></div><div class="ttdeci">#define PWR_CR1_DBP</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14208</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga0c527dcba2e6b9184b62691c6c7984c4"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga0c527dcba2e6b9184b62691c6c7984c4">PWR_WKUPFR_WKUPF4</a></div><div class="ttdeci">#define PWR_WKUPFR_WKUPF4</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14383</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga1143e41195931bccc6b9cebd7defadf8"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga1143e41195931bccc6b9cebd7defadf8">PWR_CPUCR_SBF_D1</a></div><div class="ttdeci">#define PWR_CPUCR_SBF_D1</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14335</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga186c016996c65b07e913e83155082865"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga186c016996c65b07e913e83155082865">PWR_CR2_TEMPL</a></div><div class="ttdeci">#define PWR_CR2_TEMPL</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14280</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga18df5e5c7aaa92d19eb53be04121d143"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga18df5e5c7aaa92d19eb53be04121d143">PWR_CR3_BYPASS</a></div><div class="ttdeci">#define PWR_CR3_BYPASS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14321</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga1d847c56f1d197f0f0520b432a90ffb9"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga1d847c56f1d197f0f0520b432a90ffb9">PWR_CPUCR_PDDS_D2</a></div><div class="ttdeci">#define PWR_CPUCR_PDDS_D2</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14347</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga21807d08cdbb2fbd8f42b731a5d528ce"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga21807d08cdbb2fbd8f42b731a5d528ce">PWR_CR3_VBRS</a></div><div class="ttdeci">#define PWR_CR3_VBRS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14309</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga223b7bd00095a8b2e4fdaa8acb7e35d8"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga223b7bd00095a8b2e4fdaa8acb7e35d8">PWR_WKUPCR_WKUPC4</a></div><div class="ttdeci">#define PWR_WKUPCR_WKUPC4</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14369</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga26543bcca0e8dac03aaa2acd0afd4e2c"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga26543bcca0e8dac03aaa2acd0afd4e2c">PWR_CR1_FLPS</a></div><div class="ttdeci">#define PWR_CR1_FLPS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14205</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga2d0305ff376903b25be0c2b855b54766"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga2d0305ff376903b25be0c2b855b54766">PWR_CR1_SVOS</a></div><div class="ttdeci">#define PWR_CR1_SVOS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14200</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga2e5832efbbab5ab98c031bdb891a7977"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga2e5832efbbab5ab98c031bdb891a7977">PWR_CR3_LDOEN</a></div><div class="ttdeci">#define PWR_CR3_LDOEN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14318</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga36dd5dc04502cb2bcfbbbad9247d47da"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga36dd5dc04502cb2bcfbbbad9247d47da">PWR_CR2_VBATL</a></div><div class="ttdeci">#define PWR_CR2_VBATL</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14286</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga3d4d277d03905aeac07b79e81c9af0ac"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga3d4d277d03905aeac07b79e81c9af0ac">PWR_WKUPEPR_WKUPPUPD1</a></div><div class="ttdeci">#define PWR_WKUPEPR_WKUPPUPD1</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14409</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga3e53d09fb0c22170ff5b37f7587762ec"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga3e53d09fb0c22170ff5b37f7587762ec">PWR_CPUCR_STOPF</a></div><div class="ttdeci">#define PWR_CPUCR_STOPF</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14341</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga40d45cbf0931adfbbca0af29a7740151"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga40d45cbf0931adfbbca0af29a7740151">PWR_CR3_USB33DEN</a></div><div class="ttdeci">#define PWR_CR3_USB33DEN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14306</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga474482bd93a0c1b2924cdb5d528c5948"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga474482bd93a0c1b2924cdb5d528c5948">PWR_D3CR_VOSRDY</a></div><div class="ttdeci">#define PWR_D3CR_VOSRDY</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14361</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga49eefe139ecdaf7012ae122292f9f2b2"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga49eefe139ecdaf7012ae122292f9f2b2">PWR_CPUCR_PDDS_D1</a></div><div class="ttdeci">#define PWR_CPUCR_PDDS_D1</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14350</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga4d4e251da597e8edc8374d3c7bf48c28"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga4d4e251da597e8edc8374d3c7bf48c28">PWR_CPUCR_SBF</a></div><div class="ttdeci">#define PWR_CPUCR_SBF</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14338</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga52667346e07a0e002e149f8e5424f44d"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga52667346e07a0e002e149f8e5424f44d">PWR_CR1_ALS</a></div><div class="ttdeci">#define PWR_CR1_ALS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14192</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga5566cb64c9ef928873024d23f3721050"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga5566cb64c9ef928873024d23f3721050">PWR_D3CR_VOS</a></div><div class="ttdeci">#define PWR_D3CR_VOS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14356</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga64e25571a035b217eee2f8d99f5ca20d"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga64e25571a035b217eee2f8d99f5ca20d">PWR_CR3_USB33RDY</a></div><div class="ttdeci">#define PWR_CR3_USB33RDY</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14300</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga6c8845e351ae1b92d1e6ec45395102f3"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga6c8845e351ae1b92d1e6ec45395102f3">PWR_CSR1_ACTVOSRDY</a></div><div class="ttdeci">#define PWR_CSR1_ACTVOSRDY</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14269</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga703c5e67341ec2a5dbe3d01c32e70d49"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga703c5e67341ec2a5dbe3d01c32e70d49">PWR_WKUPFR_WKUPF2</a></div><div class="ttdeci">#define PWR_WKUPFR_WKUPF2</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14386</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga732609af3be64eef8c4c243ce7f1f46c"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga732609af3be64eef8c4c243ce7f1f46c">PWR_CR2_MONEN</a></div><div class="ttdeci">#define PWR_CR2_MONEN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14292</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga7939570e266aa5f257e8314f14154bb7"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga7939570e266aa5f257e8314f14154bb7">PWR_CPUCR_PDDS_D3</a></div><div class="ttdeci">#define PWR_CPUCR_PDDS_D3</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14344</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga8387ab1b7dc6a1d8de702c6bc899c620"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga8387ab1b7dc6a1d8de702c6bc899c620">PWR_CR2_BREN</a></div><div class="ttdeci">#define PWR_CR2_BREN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14295</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_ga852ddeb6ccda1c58d5674b856b122b17"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#ga852ddeb6ccda1c58d5674b856b122b17">PWR_CPUCR_CSSF</a></div><div class="ttdeci">#define PWR_CPUCR_CSSF</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14329</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gaabba4222905284bb54d6f5157883c30b"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gaabba4222905284bb54d6f5157883c30b">PWR_CR3_VBE</a></div><div class="ttdeci">#define PWR_CR3_VBE</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14312</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gaac411ccef055ec95447cd8b736221e06"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gaac411ccef055ec95447cd8b736221e06">PWR_CR2_VBATH</a></div><div class="ttdeci">#define PWR_CR2_VBATH</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14283</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gab3f7106e80257d68575ec69d4ba3df1b"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gab3f7106e80257d68575ec69d4ba3df1b">PWR_WKUPCR_WKUPC1</a></div><div class="ttdeci">#define PWR_WKUPCR_WKUPC1</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14375</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gab519388ffad6698f98ada73c4bf81248"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gab519388ffad6698f98ada73c4bf81248">PWR_CR2_TEMPH</a></div><div class="ttdeci">#define PWR_CR2_TEMPH</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14277</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gabdf5c1446a0dda567000b561094f31c2"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gabdf5c1446a0dda567000b561094f31c2">PWR_CPUCR_RUN_D3</a></div><div class="ttdeci">#define PWR_CPUCR_RUN_D3</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14326</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gac8d2a44a38ed8ca33fdf883344065bd2"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gac8d2a44a38ed8ca33fdf883344065bd2">PWR_CR1_PVDEN</a></div><div class="ttdeci">#define PWR_CR1_PVDEN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14217</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gacc60f674740c4000a25b0e3e50ede47d"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gacc60f674740c4000a25b0e3e50ede47d">PWR_CR1_LPDS</a></div><div class="ttdeci">#define PWR_CR1_LPDS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14220</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gacc791cb5b4c8721626121b0588576db3"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gacc791cb5b4c8721626121b0588576db3">PWR_CPUCR_SBF_D2</a></div><div class="ttdeci">#define PWR_CPUCR_SBF_D2</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14332</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gacd3e1821b5493f98f758bef31203d9d4"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gacd3e1821b5493f98f758bef31203d9d4">PWR_WKUPFR_WKUPF1</a></div><div class="ttdeci">#define PWR_WKUPFR_WKUPF1</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14389</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gacdb4aff167de72e6d0b786abc6d9e45f"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gacdb4aff167de72e6d0b786abc6d9e45f">PWR_CR3_USBREGEN</a></div><div class="ttdeci">#define PWR_CR3_USBREGEN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14303</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gacff74d63fa86695d3eed64c759eb5bed"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gacff74d63fa86695d3eed64c759eb5bed">PWR_WKUPCR_WKUPC2</a></div><div class="ttdeci">#define PWR_WKUPCR_WKUPC2</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14372</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gae2163c159213a47b5aa6c498c8257e0c"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gae2163c159213a47b5aa6c498c8257e0c">PWR_WKUPCR_WKUPC6</a></div><div class="ttdeci">#define PWR_WKUPCR_WKUPC6</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14366</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gae3552758eb3c4985410fe8911560f298"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gae3552758eb3c4985410fe8911560f298">PWR_CR2_BRRDY</a></div><div class="ttdeci">#define PWR_CR2_BRRDY</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14289</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gae5d3657986e2d92c7f5f72f4422b0a52"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gae5d3657986e2d92c7f5f72f4422b0a52">PWR_CR1_AVDEN</a></div><div class="ttdeci">#define PWR_CR1_AVDEN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14197</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gaf3e9a5812547f32576265e00802de3d0"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gaf3e9a5812547f32576265e00802de3d0">PWR_CSR1_PVDO</a></div><div class="ttdeci">#define PWR_CSR1_PVDO</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14272</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gaf5a8423dbc59c5572057861d59115222"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gaf5a8423dbc59c5572057861d59115222">PWR_CR3_SCUEN</a></div><div class="ttdeci">#define PWR_CR3_SCUEN</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14315</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gaf8de82702acc1034f6061ed9d70ec67f"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gaf8de82702acc1034f6061ed9d70ec67f">PWR_CR1_PLS</a></div><div class="ttdeci">#define PWR_CR1_PLS</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14211</div></div>
<div class="ttc" id="agroup___peripheral___registers___bits___definition_html_gafff4a9218c5dd8a61f6edc1633ea91d1"><div class="ttname"><a href="group___peripheral___registers___bits___definition.html#gafff4a9218c5dd8a61f6edc1633ea91d1">PWR_WKUPFR_WKUPF6</a></div><div class="ttdeci">#define PWR_WKUPFR_WKUPF6</div><div class="ttdef"><b>Definition</b> stm32h723xx.h:14380</div></div>
<div class="ttc" id="astm32h7xx_8h_html"><div class="ttname"><a href="stm32h7xx_8h.html">stm32h7xx.h</a></div><div class="ttdoc">CMSIS STM32H7xx Device Peripheral Access Layer Header File.</div></div>
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